Abstract: A method and system comprises creating a test case that is dependent upon known sequences and executing the test case on an originating processor until it reaches a known point. The method further includes executing the test case on a different processor to perform an action and informing the originating processor that the action was taken. The action is verified as being occurred with the originating processor.

Abstract: A method and system comprises transferring data from a first processor to at least one pulse generator directly connected to an interrupt control of at least a second processor. The transferring of the data bypasses memory. The method further includes reading the transferred data directly from the at least one pulse generator by the at least a second processor.

Abstract: Sample-count feedback from bus functional models and a binary convergence algorithm are to generate optimal sampling values for an accelerator, or hardware assisted simulator. The simulator includes a bus functional model and a driver program. A software readable register maintains a count of a number of samples provided the simulator in execution of a transaction on the bus functional model. For each supported bus functional model, a sample count retrieved from the bus functional model and a last sampling value given the hardware assisted simulator is maintained, and a binary convergence algorithm applied to generate sampling values based on the last sampling value given to the hardware assisted simulator and the last actual sampling value used by a given bus functional model for a transaction.

Abstract: A method and system comprises extracting resources required to run a discrete test case or set of associated test cases on a design. The method and system further includes building a simulation model based on the extracted resources and executing the simulation model using only the extracted resources, exclusive of an entire design, to test a specific function or group of interrelated functions represented by the discrete test case or set of associated test cases for design verification, and correlating the simulation results with the test plan.

Abstract: A method and apparatus for initializing multiple processors in an integrated circuit. Each processor is uniquely identifiable. Boot code for the initialization of the processors is written so that any specialized code for a specific processor is accessed using identity of the processor.

Abstract: A secondary datum scheme is used for identifying the location of the core-produced internal geometry of hollow investment cast metal parts that are made using a free-floating core design for implementing complex internal structural features. A set of datum pads are cast on a removable portion of the core print out to provide the secondary reference system. This secondary reference system precisely establishes the location of the core-produced internal geometry of the part exclusive of any fixed external primary datum structure/system so that, for example, precision machining and gauging may be performed upon such internal features during subsequent fabrication steps.

Abstract: A bracket to hold a boarding ladder to a boat. A quick release mechanism for both the ladder and the bracket itself are disclosed. A mounting plate is substantially flush with the side of the boat. The bracket slides down into the mounting plate and latches into place. The bracket accepts the upper bar of a boarding ladder and closes a latch over the bar, holding the ladder in place. To remove the ladder, a latch at the top of the bracket is lifted and the ladder can be easily pulled free. To free the bracket from the mounting plate after the ladder has been removed, the latch is lifted and the bracket can be lifted out.

Abstract: Verification of external interfaces of cores on system-on-chip (SOC) designs frequently entails the purchase of costly standardized software models to test the external interfaces. Typically, the standardized models provide more functionality than is needed. Instead of standardized models, test models may be developed and utilized, but this also incurs cost and delay. The present invention provides an efficient and economical alternative. A mirror interface, or copy of the external interface undergoing verification, is used with a standardized control mechanism to verify the external interface. Because all interface I/O connections can thereby be utilized, a cost-effective and highly reusable way of verifying such interfaces is provided.

Abstract: The present invention relates to a bracket to hold a boarding ladder to a boat. The invention disclosed provides a quick release mechanism for both the ladder and the bracket itself. A mounting plate is substantially flush with the side of the boat. The bracket slides down into the mounting plate and latches into place. The bracket accepts the upper bar of a boarding ladder and closes a latch over the bar, holding the ladder in place. To remove the ladder, a latch at the top of the bracket is lifted and the ladder can be easily pulled free. To free the bracket from the mounting plate after the ladder has been removed, the latch is lifted and the bracket can be lifted out.

Abstract: A drainage platform supports an expendable container on a receptacle in a stable and appropriate orientation to assist in draining residual contents from the mouth of the container into the receptacle for the separate disposal of the container and the residual contents, the drainage platform including a pan with a downwardly sloping bottom and a sump with a drain, the sump being offset from the center of the drainage platform to register the drain with a corresponding offset opening in the receptacle, and a plurality of ribs establishing an essentially horizontal support for the container above the downwardly sloping bottom such that the residual contents are drained into the sump and then through the drain into the receptacle for collection and disposal of the residual contents separate from the disposal of the expendable container.