Patents by Inventor Robert Dockerty

Robert Dockerty has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6716728
    Abstract: A radiation hardened silicon-on-insulator transistor is disclosed. A dielectric layer is disposed on a substrate, and a transistor structure is disposed on the dielectric layer. The transistor structure includes a body region, a source region, a drain region, and a gate layer. The body region is formed on a first surface portion of the dielectric layer, the source region is formed on a second surface portion of the dielectric layer contiguous with the first surface portion, the drain region is formed on a third surface portion of the dielectric layer contiguous with the first surface portion, and the gate layer overlies the body region and being operative to induce a channel in that portion of the body region disposed between and adjoining the source region and the drain region. In addition, multiple diffusions are placed across two edges of the source region.
    Type: Grant
    Filed: March 5, 2002
    Date of Patent: April 6, 2004
    Assignee: BAE Systems Information and Electronic Systems Integration, Inc.
    Inventors: Robert Dockerty, Nadim Haddad, Michael J. Hurt, Frederick T. Brady
  • Publication number: 20020096719
    Abstract: A radiation hardened silicon-on-insulator transistor is disclosed. A dielectric layer is disposed on a substrate, and a transistor structure is disposed on the dielectric layer. The transistor structure includes a body region, a source region, a drain region, and a gate layer. The body region is formed on a first surface portion of the dielectric layer, the source region is formed on a second surface portion of the dielectric layer contiguous with the first surface portion, the drain region is formed on a third surface portion of the dielectric layer contiguous with the first surface portion, and the gate layer overlies the body region and being operative to induce a channel in that portion of the body region disposed between and adjoining the source region and the drain region. In addition, multiple diffusions are placed across two edges of the source region.
    Type: Application
    Filed: March 5, 2002
    Publication date: July 25, 2002
    Applicant: Lockheed Martin Corporation
    Inventors: Robert Dockerty, Nadim Haddad, Michael J. Hurt, Frederick T. Brady
  • Patent number: 6399989
    Abstract: A radiation hardened silicon-on-insulator transistor is disclosed. A dielectric layer is disposed on a substrate, and a transistor structure is disposed on the dielectric layer. The transistor structure includes a body region, a source region, a drain region, and a gate layer. The body region is formed on a first surface portion of the dielectric layer, the source region is formed on a second surface portion of the dielectric layer contiguous with the first surface portion, the drain region is formed on a third surface portion of the dielectric layer contiguous with the first surface portion, and the gate layer overlies the body region and being operative to induce a channel in that portion of the body region disposed between and adjoining the source region and the drain region. In addition, multiple diffusions are placed across two edges of the source region.
    Type: Grant
    Filed: August 1, 2000
    Date of Patent: June 4, 2002
    Assignee: BAE Systems Information and Electronic Systems Integration Inc.
    Inventors: Robert Dockerty, Nadim Haddad, Michael J. Hurt, Frederick T. Brady