Patents by Inventor Robert E. Caddy, Jr.

Robert E. Caddy, Jr. has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8553968
    Abstract: A serial number detector is disclosed for detecting an encoded serial number written on a wafer. A scanner scans the wafer to generate a raster image representing the encoded serial number, and an optical character recognition (OCR) system detects a detected serial number comprising a plurality of detected data characters and a plurality of detected redundancy characters. A character-to-binary converter converts the detected data characters and the detected redundancy characters into codeword symbols. A syndrome generator generates a plurality of error syndromes in response to the codeword symbols, and an error corrector, responsive to the error syndromes, detects and corrects errors in the codeword symbols.
    Type: Grant
    Filed: February 18, 2005
    Date of Patent: October 8, 2013
    Assignee: Western Digital Technologies, Inc.
    Inventors: Patrick J. Lee, Robert E. Caddy, Jr., Mark D. Thomas
  • Patent number: 4760472
    Abstract: A dual channel readback recovery circuit includes a high resolution channel and a low resolution channel and a data latch. A logical filter in one or both channels rejects signals that are followed by other signals if they are spaced apart less than the rejection time interval allowed by the code used. Polarity qualifying logic rejects signals in the channel that are not matched in polarity.
    Type: Grant
    Filed: February 6, 1987
    Date of Patent: July 26, 1988
    Assignee: Magnetic Peripherals Inc.
    Inventors: Vadim B. Minuhin, Robert E. Caddy, Jr.
  • Patent number: RE38360
    Abstract: A dual channel readback recovery circuit includes a high resolution channel and a low resolution channel and a data latch. A logical filter in one or both channels rejects signals that are followed by other signals if they are spaced apart less than the rejection time interval allowed by the code used. Polarity qualifying logic rejects signals in the channels that are not matched in polarity.
    Type: Grant
    Filed: April 28, 1999
    Date of Patent: December 23, 2003
    Assignee: Seagate Technology LLC
    Inventors: Vadim Minuhin, Robert E. Caddy, Jr.
  • Patent number: RE36671
    Abstract: A dual channel readback recovery circuit includes a high resolution channel and a low resolution channel and a data latch. A logical filter in one or both channels rejects signals that are followed by other signals if they are spaced apart less than the rejection time interval allowed by the code used. Polarity qualifying logic rejects signals in the channel that are not matched in polarity.
    Type: Grant
    Filed: March 4, 1994
    Date of Patent: April 25, 2000
    Assignee: Seagate Technology, Inc.
    Inventors: Vadim Minuhin, Robert E. Caddy, Jr.