Patents by Inventor Robert E. Shearer

Robert E. Shearer has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6775796
    Abstract: A method and system for generating memory array bitmaps is disclosed that uses the memory binary address and failing memory data bits collected during test of a chip as input and translates this input directly to physical location in physical design formats which uses memory and a logical to physical server in an electronic computer aided design system.
    Type: Grant
    Filed: August 31, 2001
    Date of Patent: August 10, 2004
    Assignee: International Business Machines Corporation
    Inventors: Ulrich A. Finkler, Gary W. Maier, Kevin C. Quandt, Robert E. Shearer
  • Publication number: 20030046621
    Abstract: A method and system for generating memory array bitmaps is disclosed that uses the memory binary address and failing memory data bits collected during test of a chip as input and translates this input directly to physical location in the GDSII and/or GL1 physical design formats which uses memory and a logical to physical server in an electronic computer aided design system.
    Type: Application
    Filed: August 31, 2001
    Publication date: March 6, 2003
    Inventors: Ulrich A. Finkler, Gary W. Maier, Kevin C. Quandt, Robert E. Shearer