Abstract: A method is provided for configuring a subscriber unit for operation in a wireless communications system. Information on available wireless services is advertised through well known, and publicly accessible, broadcast media, for the benefit of potential subscribers. A potential subscriber uses a subscriber unit to access the broadcast media and obtain a set of available wireless services (310). The subscriber unit supplies a particular criteria related to one or more of the available wireless services to a brokering agent, and receives from the brokering agent a list of service providers meeting the criteria (320, 330, 340). The subscriber unit then establishes a subscription relationship with a selected service provider, and self-configures to operate in a mode that supports interaction with the service provider (350).

Abstract: A radio frequency power amplifier circuit according to certain embodiments of the present invention uses a distributed radio frequency amplifier 110 having a plurality of stages each with an input. The distributed radio frequency amplifier 110 drives an output load, such as an antenna 114. A drive signal synthesizer 106, having a plurality of outputs, drives the plurality of inputs to the distributed amplifier 110. Changes in load impedance are measured, e.g., using a directional coupler 160, and the measurement is used to change a drive signal produced by the drive signal synthesizer 106 to compensate for the change in load impedance.

Abstract: A feedforward amplifier (150) according to the present invention uses a direct coupling of an amplifier stage (158) with the amplifier's load (RL). The main amplifier (202) is coupled through a transmission line (210) to the load. This direct coupled amplifier stage (158) is driven by a signal that induces a very low impedance in parallel with the load to the error signal, but appears as an open circuit to the desired signal so that the desired signal from the main amplifier is substantially unaffected.

Abstract: A delay locked loop frequency synthesizer in several embodiments uses a primary delay line element (24) and one or more secondary delay elements (162 . . . 164, 270, 310). In one embodiment, a main delay line (24) is used to coarsely select a frequency output while a secondary delay element (162 . . . 164, 270, 310), either passive or active, is used to increase the resolution of the primary delay line (24). In the passive embodiment, a coarse and fine frequency selection is possible by selecting components from the output taps of the main delay line (24) as a driving signal for the passive secondary delay element (310) to provide the coarse adjustment and selecting an output from the secondary delay element (310) to provide the fine selection.

Abstract: A feedforward amplifier and notch filter (150) according to the present invention uses a direct coupling of an amplifier stage (158) with the amplifier's load (RL). The main amplifier (202) is coupled through a transmission line (210) to the load. This direct coupled amplifier stage (158) is driven by an signal that induces a very low impedance in parallel with the load at the receive frequency, but appears as an open circuit at the desired frequencies so that the desired signal from the main amplifier is virtually unaffected while output components at the receive frequency are cancelled.

Abstract: An interference-robust coded-modulation scheme for optical communications and a method for modulating illumination for optical communications include optical signal transmitters connected to signal multipliers. The signal to be transmitted is multiplied by a pseudo-random noise code and transmitted within the transmitter emissions. A receiver converts the received modulated light and correlates the received signal. An estimate of the signal to be transmitted is made by multiplying the received signal by the noise code and correlating such multiplication over the length of the code. A threshold switch outputs the correlation result to a bit estimator approximately when a deterministic peak of the output signal exceeds a threshold.

Abstract: A frequency signal generator (300) generates a desired output signal Fout (365) based on the ratio of the frequency a reference clock signal (301) to that of the desired output signal (Fclk/Fout)=N+R, where the N is an integer portion and R is a fractional portion of the ratio. A counter (320) generates a counter overflow signal based on counting a minimum of N transitions of the reference clock signal. An accumulator (330) accumulates the fractional portion R in response to the counter overflow signal (325), and outputs the accumulated value (335) that is preferably used as address information for selecting one of a number of delay paths (340, 350) for outputting the desired output signal.

Abstract: A parameter extraction technique for an electrical structure is based on a definition of network parameters that isolates pure mode responses of the electrical structure, and that makes mode conversion responses of the electrical structure negligible. A set of network parameters is obtained that represents pure mode responses for the electrical structure (410). These network parameters are processed to obtain model parameters that characterize each pure mode response (422, 424, 426, 428, 432, 434, 436, 438). Preferably, the mode specific parameters to combined to obtain mode independent parameters, such as coupling factor, propagation constant, and characteristic impedance values (440, 450).

Abstract: High quality epitaxial layers of monocrystalline materials can be grown overlying monocrystalline substrates such as large silicon wafers by forming a compliant substrate for growing the monocrystalline layers. An accommodating buffer layer comprises a layer of monocrystalline oxide spaced apart from a silicon wafer by an amorphous interface layer of silicon oxide. The amorphous interface layer dissipates strain and permits the growth of a high quality monocrystalline oxide accommodating buffer layer. The accommodating buffer layer is lattice matched to both the underlying silicon wafer and the overlying monocrystalline material layer. Any lattice mismatch between the accommodating buffer layer and the underlying silicon substrate is taken care of by the amorphous interface layer. In addition, formation of a compliant substrate may include utilizing surfactant enhanced epitaxy, epitaxial growth of single crystal silicon onto single crystal oxide, and epitaxial growth of Zintl phase materials.

Abstract: High quality layers of monocrystalline materials can be grown overlying monocrystalline substrates such as large silicon wafers by forming a compliant substrate for growing the monocrystalline layers. An accommodating buffer layer comprises a layer of monocrystalline oxide spaced apart from a silicon wafer by an amorphous interface layer of silicon oxide. The amorphous interface layer dissipates strain and permits the growth of a high quality monocrystalline oxide accommodating buffer layer. The accommodating buffer layer is lattice matched to both the underlying silicon wafer and the overlying monocrystalline material layer. Any lattice mismatch between the accommodating buffer layer and the underlying silicon substrate is taken care of by the amorphous interface layer. In addition, formation of a compliant substrate may include utilizing surfactant enhanced epitaxy, epitaxial growth of single crystal silicon onto single crystal oxide, and epitaxial growth of Zintl phase materials.

Abstract: A semiconductor apparatus for effecting a plurality of functions involving high frequency signals and low frequency signals includes: (a) at least one first circuit section implemented in at least one first semiconductor material; and (b) at least one second circuit section implemented in at least one second semiconductor material. The at least one second semiconductor material exhibits lower noise generating characteristics than the at least one first semiconductor material at the low frequency signals. The at least one first circuit section and the at least one second circuit section are implemented in an integrated circuit construction. Preferably the integrated circuit construction is a monolithic configuration. Preferably the at least one first semiconductor material includes gallium arsenide. Preferably the at least one second semiconductor material includes silicon.

Abstract: A composite semiconductor including silicon and compound semiconductor, and having a metal semiconductor field effect transistor (MESFET) integrated at least partially with the silicon and at least partially with the GaAs having a silicon back gate is provided. The back gate for the MESFET may be formed by doping a region of the monocrystalline silicon substrate before forming the transistor. In a structure according the invention, integrated circuits may be provided to match the threshold voltages of one MESFET to another, improve the transconductance of a MESFET, and improve the switching speed of a MESFET.

Abstract: High quality epitaxial layers of monocrystalline materials can be grown overlying monocrystalline substrates such as large silicon wafers by forming a compliant substrate for growing the monocrystalline layers. Devices may be formed in the silicon wafer prior to growing the high quality epitaxial layers. Then, to achieve the formation of a compliant substrate, an accommodating buffer layer is grown on silicon wafer. The accommodating buffer layer is a layer of monocrystalline oxide spaced apart from the silicon wafer by an amorphous interface layer of silicon oxide. The amorphous interface layer dissipates strain and permits the growth of a high quality monocrystalline oxide accommodating buffer layer. The accommodating buffer layer is lattice matched to both the underlying silicon wafer and the overlying monocrystalline material layer. Compound devices are then formed on the overlying monocrystalline layer.

Abstract: A process and a semiconductor structure are disclosed for fabricating substantially identical tuned ferro-electric components for varying the frequency or phase of a radio frequency signal at multiple locations of an integrated circuit using the same control voltage. The process includes the steps of epitaxially forming a monocrystalline layer of ferro-electric material on a monocrystalline ground plane; forming an input electrically coupled to the monocrystalline layer of ferro-electric material for receiving a bias voltage to vary at least one of a frequency and a phase of a radio frequency signal; epitaxially forming a monocrystalline layer of an electrically conductive material on the monocrystalline layer of ferro-electric material to constitute a transmission line; and forming an input electrically coupled to the transmission line for receiving the radio frequency signal.

Abstract: Phase shift key modulators (100, 500, 1000, 1400, 1700) are provided in which a multiphase signal source (108, 1402, 1406-1412,1702) is used to generate a plurality of phases of a carrier signal. A selector (110) is used to select one phase or a sequence of phases of the carrier signal to represent each bit pattern that is received from a binary data source (102, 1422). The multiphase signal source preferably comprises a multiphase oscillator that includes a phase locked ring of variable propagation delay inverters (202). Preferably, a phase sequencer (502) is used to select a monotonic sequence of phases to represent each bit pattern. Preferably two phase selectors (110, 1004) are used to simultaneously select two phases of carrier signal, and a phase interpolator (1106) is used to generate a sequence of phases from the two phases selected by the two phase selectors (110, 1004).

Abstract: Composite semiconductor structures and methods are provided for communications systems, specifically, those utilizing RF signals. Antenna switches, and amplifiers in receiver and transmitter sections of the communications systems are shown that are fabricated within a compound semiconductor layer of a composite semiconductor structure is integrated with support circuitry in a non-compound semiconductor substrate. Support circuitry that may be integrated include negative voltage generation circuitry, drain current protection circuitry, and voltage regulation circuitry.

Abstract: An interference-robust coded-modulation scheme for optical communications and a method for modulating illumination for optical communications include optical signal transmitters connected to signal multipliers. The signal to be transmitted is multiplied by a pseudo-random noise code and transmitted within the transmitter emissions. A receiver converts the received modulated light and correlates the received signal. An estimate of the signal to be transmitted is made by multiplying the received signal by the noise code and correlating such multiplication over the length of the code. A threshold switch outputs the correlation result to a bit estimator approximately when a deterministic peak of the output signal exceeds a threshold.

Abstract: A modulated signal, having a varying magnitude signal envelope, is conditioned, such as to facilitate amplification (500). Minimum values are determined values for portions of the signal envelope (520, 530), and a window expansion function applied to scale each portion of the signal envelope having a minimum value below a particular threshold, such that each scaled portion has a new minimum value of at least the particular threshold (535, 540, 550, 555).

Abstract: A tunable inductor circuit and phase tuning circuit utilizing a tunable inductor circuit for dynamically controlling signal phase delay in RF/Microwave Circuits and related applications. The tunable inductor includes an inductor and a voltage variable capacitor connected to each other. The tunable inductor and voltage variable capacitor can be connected to each other in parallel or in series. The phase tuning circuit includes at least one tunable inductor circuit and at least one voltage variable capacitor coupled to the at least one tunable inductor circuit, wherein the at least one tunable inductor circuit and the voltage variable capacitor are responsive to control signals to alter a tuning characteristic of the phase tuning circuit.

Abstract: A power amplifier includes a carrier amplifier path and a peaking amplifier path. The carrier amplifier path includes a carrier amplifier (208), and an impedance transforming network (214). The peaking amplifier path includes a peaking amplifier (210), an impedance transforming network (216), and a phase delay quarter wave element (226). The arrangement forms an inverted Doherty combiner where as the nominal impedance at a summing node (230) increases with increased conduction from the peaking amplifier, the load impedance at the output of the carrier amplifier decreases so as to maintain the carrier amplifier at a saturation point as the input signal (232) increases, and results in a reduction of the number of phase delay elements needed over a conventional Doherty approach. In a preferred embodiment the carrier and peaking amplifiers consist of cascaded stages, and are disposed on a common integrated circuit die (304).