Patents by Inventor Robert E. Thomas

Robert E. Thomas has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250136309
    Abstract: A filling apparatus 20 includes a filler table structure 22 disposed within a protective and supporting main housing 24. The filler table structure 22 receives and supports containers 26 to be filled with product from filler heads 28 positioned above the filler table structure. The containers 26 to be filled arrive at the filler table structure 22 on infeed conveyances 30 and then are precisely positioned at a filling position beneath the filler heads 28 by indexing systems 32. Thereafter, the filled containers 26 are transferred by the indexing systems 32 to an out feed conveyance 34. Each filler head 28 is capable of cycling at a speed of at least 30 times per minute, whereby the filling station 20 is capable of filling containers 26 at a rate of at least 30 containers per minute per filler head.
    Type: Application
    Filed: September 20, 2022
    Publication date: May 1, 2025
    Applicant: PLF INTERNATIONAL LIMITED
    Inventor: Robert E. Thomas
  • Patent number: 6466997
    Abstract: A method and system for requesting an interrupt from a host system to service an adapter connected to the host system and a data interface. Data packets, including one or more data cells, are transferred between the data interface and the host system. The host system includes a host memory that includes a plurality of memory slots to store data packets transferred between the data interface and the host system. It is determined when a transfer of data has resulted in an occurrence of an interrupt event. An interrupt event occurs when the transfer of data includes a transfer of a data cell between the data interface and the host system and the data cell is defined to be an end of a data packet. In response to the occurrence of an interrupt event, it is determined whether to generate an interrupt request to the host system.
    Type: Grant
    Filed: June 14, 1999
    Date of Patent: October 15, 2002
    Assignee: Enterasys Networks, Inc.
    Inventors: Theodore L. Ross, Douglas M. Washabaugh, Peter J. Roman, Wing Cheung, Koichi Tanaka, Shinichi Mizuguchi, Robert E. Thomas
  • Patent number: 6212567
    Abstract: A mechanism for mitigating the rate at which status reports associated with raw cell data transfers occur during receive operations in a network node is presented. The network node has an adapter for coupling a network and a host system, the host system including a host memory. The adapter operates to reassemble cell data received from the network and store the reassembled cell data in the host memory. A raw report holdoff counter is programmed to count a number corresponding to a preselected rx raw report holdoff value. If a raw cell data transfer request to be processed is detected, rx raw report information necessary to creating an rx raw cell status report is copied to a temporary storage area. When the data is transferred to the host system, the raw report holdoff counter is modified by one. When the modified counter has expired, the rx raw report information is written to a report queue in host memory.
    Type: Grant
    Filed: September 12, 1996
    Date of Patent: April 3, 2001
    Assignee: Compaq Computer Corporation
    Inventors: Robert E. Thomas, Douglas M. Washabaugh, Peter J. Roman, Wing Cheung
  • Patent number: 6167049
    Abstract: A scheduler in accord with the invention schedules available bit rate (ABR) traffic over an asynchronous transfer mode (ATM) link in such a manner as to provide circuits having the ABR traffic service a minimum cell rate (MCR) that may be greater than zero. The scheduler uses static scheduling information to schedule traffic for high priority services, such as constant bit rate service. The static information also specifies transmit opportunities for an ABR circuit, in a manner analogous to that for CBR traffic. The statically scheduled transmit opportunities provide a negotiated minimum cell rate that is greater than zero, for the ABR circuit. The scheduler maintains dynamic scheduling information, which it uses to schedule traffic in otherwise available transmit times. For example, the scheduler may use the dynamic information to create a work list of virtual circuit connections for ABR service. During any cell transmit time that is not used by a higher priority service (e.g.
    Type: Grant
    Filed: November 18, 1997
    Date of Patent: December 26, 2000
    Assignees: Cabletron Systems, Inc., Kabushiki Kaisya Toshiba
    Inventors: Tong-Bi Pei, Kohei Abe, Robert E. Thomas
  • Patent number: 6068009
    Abstract: This technical disclosure is for a structurally self-contained, RF-shielded enclosure which is rapidly deployable due to it's ultra light weight and ease of assembly. Assembled by one person in one half hour, the enclosure becomes an RF-shielded, free standing room within an existing non-secure room or environment. Lightweight metallized fabric is sewn together with rugged tent fabric and ballistics cloth. Fiberglass rods are connected to aluminum sleeves and unions to configure the room. A bulkhead assembly penetrates the side wall and provides filtered power and electronic signal interfaces. Honeycomb air guides and an electric fan facilitate air exchange within the room.
    Type: Grant
    Filed: June 1, 1999
    Date of Patent: May 30, 2000
    Inventors: Ned Z. Paes, Terry Phillips, Robert E. Thomas, Joseph H. Aldridge
  • Patent number: 6067563
    Abstract: A mechanism for avoiding an initiation of control read transactions on a system bus coupling a host system having a host memory and an interface connected to a peripheral unit as data is moved between the host system and the peripheral unit is presented. Control information associated with data memory portions in host memory is written to the interface for data memory portions storing outgoing data and data memory portions to receive incoming data. The interface includes a controller to move data between the host memory and the interface by first obtaining the control information for the associated data portions. The interface writes status reports in association with the movement of data between the interface and the host memory via the system bus. The mechanism thus enables data transfers to occur via the system without the initiation of control reads in absence of an exception condition.
    Type: Grant
    Filed: May 6, 1999
    Date of Patent: May 23, 2000
    Assignee: Cabletron Systems, Inc.
    Inventors: Robert E. Thomas, Douglas M. Washabaugh, Peter J. Roman, Wing Cheung
  • Patent number: 5995995
    Abstract: A method of scheduling the transmission of cells from a network node involves storing entries in a schedule table at predetermined locations, wherein each location represents a point in time at which a cell is to be transmitted. Each entry in the table contains a pointer to a list of virtual circuits having cells scheduled for transmission at the time corresponding to the location of the entry in the table. When a VC has a cell to be transmitted at a particular time, the VC is queued to the head, rather than the tail, of the list of VCs pointed to by the pointer located at the entry in the table corresponding to the time at which the cell is to be transmitted. The VC is therefore the first VC transmitted from the list of VCs.
    Type: Grant
    Filed: September 12, 1996
    Date of Patent: November 30, 1999
    Assignee: Cabletron Systems, Inc.
    Inventors: Robert E. Thomas, Robert J. Simcoe, Peter J. Roman, Anna Charny, Wing Cheung
  • Patent number: 5970229
    Abstract: An apparatus and method for transferring data from a source memory (e.g. a host memory) to a peripheral interface via a bus utilizes a transmit buffer memory coupled to the peripheral interface, and a current time counter advancing at the rate at which data is to be transferred from the transmit buffer memory to the peripheral interface. A schedule table data structure stores entries in some or all of its locations, where each location corresponds to a point in time at which data is to be transferred from the transmit buffer memory to the peripheral interface. A schedule table pointer is used for pointing to successive locations in the schedule table. The schedule table pointer advances at a rate faster than the current time counter advances so that the schedule table pointer represents a point in time which is ahead of the point in time currently output by the current time counter.
    Type: Grant
    Filed: September 12, 1996
    Date of Patent: October 19, 1999
    Assignee: Cabletron Systems, Inc.
    Inventors: Robert E. Thomas, Peter J. Roman, Wing Cheung
  • Patent number: 5966546
    Abstract: A mechanism by which interrupt frequency mitigation is combined with transmit raw cell status report frequency mitigation is presented. A tx raw cell status report is allowed to occur for only every N raw cell tx slots consumed. When the rate of interrupt requests is mitigated in accordance with holdoff parameters including a holdoff event count corresponding to X interrupt events and a holdoff time interval, and the raw cell status report counts as an interrupt event, an interrupt request is generated for an enabled interrupt if N*X events has occurred or the holdoff time interval has elapsed.
    Type: Grant
    Filed: September 12, 1996
    Date of Patent: October 12, 1999
    Assignee: Cabletron Systems, Inc.
    Inventors: Robert E. Thomas, Theodore L. Ross, Douglas M. Washabaugh, Peter J. Roman, Wing Cheung, Koichi Tanaka, Shinichi Mizuguchi
  • Patent number: 5960215
    Abstract: A method and apparatus for transferring data units between a host memory and a peripheral interface, the data units being subject to a flow control mechanism whereby some of said data units are flow controlled and some of said data units are not. Two transmit buffer memories are coupled to the peripheral interface; one for storing controlled data units to be transferred to the peripheral interface and the other for storing uncontrolled data units to be transferred to the peripheral interface. A single request buffer stores successive requests for data to be transferred from a host memory to either of the two transmit buffer memories. Data transfer circuitry transfers data from the host memory to either of the two transmit buffer memories in response to the requests stored in the request buffer.
    Type: Grant
    Filed: September 12, 1996
    Date of Patent: September 28, 1999
    Assignee: Digital Equipment Corporation
    Inventors: Robert E. Thomas, Robert J. Simcoe, Peter J. Roman, Koichi Tanaka
  • Patent number: 5941952
    Abstract: An apparatus and method for transferring data from a source memory to a transmit buffer memory and then from the transmit buffer memory at a particular rate. A current time counter advances at the rate at which data is to be transmitted from the transmit buffer memory to the interface. A schedule memory stores entries, each valid entry being associated with data that is to be transmitted from the transmit buffer memory to the interface. A timestamp is associated with each valid entry in the schedule memory.
    Type: Grant
    Filed: September 12, 1996
    Date of Patent: August 24, 1999
    Assignee: Cabletron Systems, Inc.
    Inventors: Robert E. Thomas, Peter J. Roman, Wing Cheung
  • Patent number: 5922046
    Abstract: A mechanism for avoiding the initiation of control read transactions on a system bus coupling a host system having a host memory and an interface connected to a peripheral unit as data is moved between the host system and the peripheral unit is presented. Control information associated with data memory portions in host memory is written to the interface for data memory portions storing outgoing data and data memory portions to receive incoming data. The interface includes a controller for moving data between the host memory and the interface by first obtaining the control information for the associated data portions. The interface writes status reports in association with the movement of data between the interface and the host memory via the system bus. The mechanism thus enables data transfers to occur via the system without the initiation of control reads in absence of an exception condition.
    Type: Grant
    Filed: September 12, 1996
    Date of Patent: July 13, 1999
    Assignee: Cabletron Systems, Inc.
    Inventors: Robert E. Thomas, Douglas M. Washabaugh, Peter J. Roman, Wing Cheung
  • Patent number: 5908043
    Abstract: This technical disclosure is for a structurally self-contained, RF-shielded enclosure which is rapidly deployable due to it's ultra light weight and ease of assembly. Assembled by one person in one half hour, the enclosure becomes an RF-shielded, free standing room within an existing non-secure room or environment. Lightweight metallized fabric is sewn together with rugged tent fabric and ballistics cloth. Fiberglass rods are connected to aluminum sleeves and unions to configure the room. A bulkhead assembly penetrates the side wall and provides filtered power and electronic signal interfaces. Honeycomb air guides and an electric fan facilitate air exchange within the room.
    Type: Grant
    Filed: February 3, 1992
    Date of Patent: June 1, 1999
    Assignee: Bema, Inc.
    Inventors: Ned Z. Paes, Terry Phillips, Robert E. Thomas, Joseph H. Aldridge
  • Patent number: 5867480
    Abstract: In a network node having a host system coupled to a network by an adapter, VC-specific congestion is detected and reported to the host system. The host memory includes rx slots or buffers, each corresponding to one of one or more supported slot types. Per-VC slots consumed counters are maintained to count slot consumption for each active VC. Free buffer FIFOs are maintained for each of the one or more slot types, which have a predetermined congestion threshold associated therewith. Entries in each free buffer FIFO correspond to an rx slot posted by the host system. When a new rx slot or buffer in host memory is to be allocated to an incoming cell received on a given VC, the slots consumed counter is compared to the predetermined congestion threshold. If they are equal, the VC is at threshold level and the incoming cell is discarded and a report is sent to the host system.
    Type: Grant
    Filed: September 12, 1996
    Date of Patent: February 2, 1999
    Assignee: Cabletron Systems, Inc.
    Inventors: Robert E. Thomas, Koichi Tanaka, Peter J. Roman, Wing Cheung, Shinichi Mizuguchi
  • Patent number: 5862206
    Abstract: A status report frequency mitigation mechanism for mitigating the frequency of status report generation for raw cells during transmit operations in a network node is presented. The status report frequency mitigation mechanism operates to adjust the frequency with which status reports for raw cells are generated by manipulating the End-of-Packet (EOP) bit in transmit slot descriptors associated with transmit slots containing raw cell data.
    Type: Grant
    Filed: September 12, 1996
    Date of Patent: January 19, 1999
    Assignee: Cabletron Systems, Inc.
    Inventors: Robert E. Thomas, Douglas M. Washabaugh, Peter J. Roman, Wing Cheung
  • Patent number: 5822612
    Abstract: An apparatus and method for scheduling data transfers between a host and adapter. A schedule table data structure resides in a memory on the adapter. Each location in the schedule table represents a point in time at which data is to be transmitted from the adapter. A current time counter advances at the rate at which data is to be transmitted from the node. A pointer points to successive locations in the schedule table, and advances through the schedule table at a rate faster than the current time counter advances so that the value stored in the pointer represents a point in time which is ahead of the point in time currently represented by the value output from the current time counter. A request for a data transfer between the host and adapter is generated when a valid entry exists at the location pointed to by the pointer. The value of the pointer at the time the request is generated is stored as the last valid time.
    Type: Grant
    Filed: September 12, 1996
    Date of Patent: October 13, 1998
    Inventors: Robert E. Thomas, Peter J. Roman, Koichi Tanaka, Wing Cheung
  • Patent number: 5796966
    Abstract: A mechanism for operating a configurable switch to dynamically (i) route each of the data packets in an ordered string from a particular switch input port through a selected member output port of a hunt group; and (ii) route data packets which need not be transmitted in order from the input ports to available member output ports of the hunt group, as the members become available. A controller assigns each input port a service number, and directs member output ports to handle requests for ordered data packet transmissions from input ports with particular service numbers, such that the ordered transfers from an input port are handled by a single member of each group. The input port broadcasts, through the switch, a request to send ordered data packets through a particular hunt group and includes its service number in the request. The group member assigned to handle ordered transfers from the input port responds by identifying itself.
    Type: Grant
    Filed: May 5, 1997
    Date of Patent: August 18, 1998
    Assignee: Digital Equipment Corporation
    Inventors: Robert Simcoe, Robert E. Thomas, George Varghese
  • Patent number: 5543235
    Abstract: The present invention provides multiple grade, composite cemented carbide articles and a method of making such articles. The cemented carbide articles comprise carbides of different grades (or different compositions and/or microstructures) and, therefore, correspondingly different properties at different locations in the same article. The method of the present invention comprises filling different areas or portions of a die with metallurgical powders having different compositions and/or microstructures. The powder is then compressed as a single compact in the die cavity. The compressed compact is subsequently sintered to produce a multigrade cemented carbide article having composition and/or microstructural variations within the volume of the article.
    Type: Grant
    Filed: April 26, 1994
    Date of Patent: August 6, 1996
    Assignee: SinterMet
    Inventors: Prakash K. Mirchandani, Robert E. Thomas, Mark Cippel
  • Patent number: 5535209
    Abstract: In an interactive video-on-demand system, real-time programs are encoded as a transport stream including a plurality of transport stream packets. Some of the transport stream packets include timing signals indicating the real time of the program. The transport stream packets are formatted into transport cells for transport over an asynchronous transfer mode network from a source to a destination. The cells are transported at a transport rate which is determined by a network clock. The transport rate is chosen to deliver the transport stream faster than the real time of the program. While transporting the transport stream, it is determined if the transport stream is being transported ahead of the real time of the program. In this case, idle cells are injected into the transport stream to have the program arrive at the destination in the real time of the program.
    Type: Grant
    Filed: April 10, 1995
    Date of Patent: July 9, 1996
    Assignee: Digital Equipment Corporation
    Inventors: Stephen D. Glaser, Robert E. Thomas, Robert J. Walsh
  • Patent number: 5434855
    Abstract: A novel mechanism prevents interleaving of packet cells from different source nodes on the same multicast port group at switches of a multicast virtual circuit in a cell-switched network: however, different cells bound for different multicast port groups may be interleaved. The mechanism comprises specific routing information that is stored in each multicast group port entry of a forwarding table located within each switch of the multicast virtual circuit. The forwarding table also stores information relating to each multicast port group including a virtual circuit value for each port of the multicast group. The specific routing information is provided for each multicast port group entry to notify the switch when data traffic for a particular packet is pending through a port of the multicast group and when that data traffic ceases, i.e., when the "end-of-packet" is reached. This ensures that the packets may be correctly reassembled at the destination nodes.
    Type: Grant
    Filed: October 28, 1994
    Date of Patent: July 18, 1995
    Assignee: Digital Equipment Corporation, Patent Law Group
    Inventors: Radia J. Perlman, Charles W. Kaufman, Robert E. Thomas, William R. Hawe