Abstract: A method of adjusting core and un-core operating frequencies of two or more processors of a server includes determining core and un-core operating frequency variations versus power consumption limit variations of the two or more processors. The method also includes determining two or more first power consumption levels associated with the two or more processors. Each one of the two or more processors run at essentially a same target core operating frequency and at a same target un-core operating frequency at the respective first power consumption level of the processor. The method further includes adjusting the core and un-core operating frequencies of the two or more processors by setting a power consumption limit of each one of the two or more processors at the respective first power consumption level of the processor.

Abstract: Examples herein relate to an adjustment of a power limit of a processor. Examples disclose setting the power limit of the processor. The examples also obtaining a temperature difference between a die temperature of a core within the processor and a throttle temperature. In response to a determination that the temperature difference is at most equal to a temperature activation point, adjusting the power limit of the processor so that the adjust power limit is less than the set power limit.

Abstract: Example implementations relate to a self-tune controller. For example, the self-tune controller may poll, via an out-of-band data stream, low-level operation information about a processor or a bus of a computing system under a present workload. At least some of the low-level operation information may be descriptive of a nature of traffic on the bus. The self-tune controller may program, via an out-of-band control signal, a setting of the computing system for the present workload based on the low-level operation information.

Abstract: In one example in accordance with the present disclosure, a method for determining operating frequencies includes receiving a warranty period for a computer component. The method includes determining an operating frequency that will cause a predicted life cycle of the computer component operating at the operating frequency to fall within the warranty period. The method includes setting the computer component to operate at the operating frequency.

Abstract: A method of adjusting core and un-core operating frequencies of two or more processors of a server includes determining core and un-core operating frequency variations versus power consumption limit variations of the two or more processors. The method also includes determining two or more first power consumption levels associated with the two or more processors. Each one of the two or more processors run at essentially a same target core operating frequency and at a same target un-core operating frequency at the respective first power consumption level of the processor. The method further includes adjusting the core and un-core operating frequencies of the two or more processors by setting a power consumption limit of each one of the two or more processors at the respective first power consumption level of the processor.

Abstract: Examples herein relate to an adjustment of a power limit of a processor. Examples disclose setting the power limit of the processor. The examples also obtaining a temperature difference between a die temperature of a core within the processor and a throttle temperature. In response to a determination that the temperature difference is at most equal to a temperature activation point, adjusting the power limit of the processor so that the adjust power limit is less than the set power limit.

Abstract: In one example in accordance with the present disclosure, a method may comprise collecting environment information for a processor, determining a maximum power level for the processor and setting a frequency level and a core-to-frequency ratio that maintains the maximum power for the processor. The frequency level and the core-to-frequency are respectively controlled by a programmable frequency register and a programmable core register. The method may comprise receiving a die temperature corresponding to the processor, determining that the die temperature exceeds a temperature corresponding to the processor and adjusting the maximum power to a level that maintains the temperature.

Abstract: In one example in accordance with the present disclosure, a method may comprise collecting environment information for a processor, determining a maximum power level for the processor and setting a frequency level and a core-to-frequency ratio that maintains the maximum power for the processor. The frequency level and the core-to-frequency are respectively controlled by a programmable frequency register and a programmable core register. The method may comprise receiving a die temperature corresponding to the processor, determining that the die temperature exceeds a temperature corresponding to the processor and adjusting the maximum power to a level that maintains the temperature.

Abstract: In one example in accordance with the present disclosure, a method for determining operating frequencies includes receiving a warranty period for a computer component. The method includes determining an operating frequency that will cause a predicted life cycle of the computer component operating at the operating frequency to fall within the warranty period. The method includes setting the computer component to operate at the operating frequency.

Abstract: Example implementations relate to a self-tune controller. For example, the self-tune controller may poll, via an out-of-band data stream, low-level operation information about a processor or a bus of a computing system under a present workload. At least some of the low-level operation information may be descriptive of a nature of traffic on the bus. The self-tune controller may program, via an out-of-band control signal, a setting of the computing system for the present workload based on the low-level operation information.

Abstract: To migrate data from a first storage system to a second storage system, the second storage system detects a migration of a persistent storage media from the first storage system to the second storage system. In response to detecting the migration of the persistent storage media, write information from a write cache in the first storage system is copied to a write cache in the second storage system, where the write caches in the first and second storage systems were not maintained synchronously before the write information from the write cache in the first storage system is copied to the write cache in the second storage system.

Abstract: Techniques that relate to wear-leveling cores of a multi-core processor are described in various implementations. The techniques may include determining, for a plurality of cores of a multi-core processor, usage information that is indicative of past wear on the plurality of cores. The techniques may also include selectively activating a subset of the plurality of cores based on the usage information such that cores that exhibit less wear relative to other cores are preferentially selected for activation.

Abstract: A method for loading a cache is disclosed. Data in a computer file is stored on a storage device. The computer file is associated with a computer program. The first step is to determine which logical memory blocks on the storage device correspond to the computer files (402). The next step is to take the data stored in the logical memory blocks and load it into a cache (404). The data is loaded into the cache before data from the file is requested by the computer programs.

Abstract: To migrate data from a first storage system to a second storage system, the second storage system detects a migration of a persistent storage media from the first storage system to the second storage system. In response to detecting the migration of the persistent storage media, write information from a write cache in the first storage system is copied to a write cache in the second storage system, where the write caches in the first and second storage systems were not maintained synchronously before the write information from the write cache in the first storage system is copied to the write cache in the second storage system.

Abstract: Disclosed is a system and related method for providing operating system drivers during installation of an operating system. In particular, the operating system drivers, that are not available with the operating system itself, are stored in unreserved ROM space. At an appropriate time during installation of the operating system, any needed or necessary drivers are copied from the ROM.

Abstract: Disclosed is a system and related method for providing operating system drivers during installation of an operating system. In particular, the operating system drivers, that are not available with the operating system itself, are stored in unreserved ROM space. At an appropriate time during installation of the operating system, any needed or necessary drivers are copied from the ROM.

Abstract: A computer system in accordance with the present invention provides a method of communicating asynchronous events from a mini-port driver of a computer system to a software component without polling the mini-port driver. The computer system provides a monolithic driver as a dispatch between a mini-port driver and a software component. Until an asynchronous event is detected, an event thread in the monolithic driver to a software component is blocked. When an asynchronous event is detected by the mini-port driver, the mini-port driver calls the monolithic driver with a monolithic driver entry point which queues the event and unblocks the event thread. The monolithic driver provides the asynchronous event to the software component through the unblocked event thread. The event thread is then re-blocked and remains blocked until another asynchronous event is detected. Asynchronous events are thereby communicated from a mini-port driver to a software component without polling the mini-port driver.