Patents by Inventor Robert Edward Belke, Jr.

Robert Edward Belke, Jr. has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6998540
    Abstract: A multi-layer electronic circuit board design 10 having selectively formed apertures or cavities 26 which have improved solder-wetting characteristics.
    Type: Grant
    Filed: April 29, 2003
    Date of Patent: February 14, 2006
    Assignee: Visteon Global Technologies, Inc.
    Inventors: Robert Edward Belke, Jr., Vivek A. Jairazbhoy, Thomas B. Krautheim, William F. Quitty, Jr.
  • Patent number: 6585903
    Abstract: A multi-layer electronic circuit board design 10 having selectively formed apertures or cavities 26 which have improved solder-wetting characteristics by causing a first insulating layer to separate from a portion of a first conductive layer of the multi-layer electronic circuit board 10 which allows for communication by and between some or all of the various component containing surfaces, and portions of the formed multi-layer electrical circuit board 10, which selectively allows components contained within and/or upon these portions and surfaces to be interconnected.
    Type: Grant
    Filed: September 6, 2000
    Date of Patent: July 1, 2003
    Assignee: Visteon Global Tech. Inc.
    Inventors: Robert Edward Belke, Jr., Vivek A. Jairazbhoy, Thomas B. Krautheim, William F. Quitty, Jr.
  • Patent number: 6555015
    Abstract: Method of manufacturing a multi-layer printed circuit board adapted for reduce interfacial sheer stresses includes a laminate substrate having a top layer forming a first major surface, a middle layer having a predetermined thickness and a bottom layer forming a second major surface opposed to the first major surface. Etch resists are disposed on the first and second surfaces corresponding to reverse images of desired conductor patterns. The first and second surfaces are thereafter etched and the photoresist removed. The laminate substrate is secured via a low modules adhesive layer to a major surface of a base. The middle layer of the laminate substrate is thereafter selectively etched so as to isolate selected portions of the first and second surfaces and to define inner connect regions therebetween having a height equal to the predetermined thickness.
    Type: Grant
    Filed: November 9, 2000
    Date of Patent: April 29, 2003
    Assignee: Visteon Global Technologies, Inc.
    Inventors: Daniel Phillip Dailey, Robert Edward Belke, Jr., Jay DeAvis Baker, Achyuta Achari, Myron Lemecha, Michael George Todd
  • Patent number: 6528736
    Abstract: Method of manufacturing a multi-layer printed circuit board adapted for reduce interfacial sheer stresses includes a laminate substrate having a top layer forming a first major surface, a middle layer having a predetermined thickness and a bottom layer forming a second major surface opposed to the first major surface. Etch resists are disposed on the first and second surfaces corresponding to reverse images of desired conductor patterns. The first and second surfaces are thereafter etched and the photoresist removed. The laminate substrate is secured via a low modules adhesive layer to a major surface of a base. The middle layer of the laminate substrate is thereafter selectively etched so as to isolate selected portions of the first and second surfaces and to define inner connect regions therebetween having a height equal to the predetermined thickness.
    Type: Grant
    Filed: January 21, 1997
    Date of Patent: March 4, 2003
    Assignee: Visteon Global Technologies, Inc.
    Inventors: Daniel Phillip Dailey, Robert Edward Belke, Jr., Jay DeAvis Baker, Achyuta Achari, Myron Lemecha, Michael George Todd
  • Patent number: 6475703
    Abstract: A multilayer circuit board having air bridge crossover structures and an additive method for producing the same, wherein the circuit includes specially designed metallic fortifying layers to mechanically and/or electrically fortify the circuit.
    Type: Grant
    Filed: December 1, 1998
    Date of Patent: November 5, 2002
    Assignee: Visteon Global Technologies, Inc.
    Inventors: Delin Li, Achyuta Achari, Alice Dawn Zitzmann, Robert Edward Belke, Jr., Brenda Joyce Nation, Edward McLeskey, Mohan R. Paruchuri, Lakhi Nandlal Goenka
  • Patent number: 6326241
    Abstract: A solderless method for assembling a semiconductor electronic flip-chip device to an electrical interconnecting substrate including the steps of forming a plurality of raised electrical contacts and plurality of contact pads. The pads correspond in number and physical location with the electrical contacts. The pads and contact mate when brought together. A quantity of plastic material is interposed between the electrical device and substrate. The plastic material is heated so that it softens and flows. The electronic device and substrate are urged together. The urging step displaces the molten plastic material from between the contacts and pads. The contacts and pads are jointed directly without any adhesive, solder or conducive filler therebetween to electrically interconnect the electronic device and substrate. The plastic material is allowed to cool whereby the electronic device and substrate are adhesively bonded together and electrically interconnected.
    Type: Grant
    Filed: December 29, 1997
    Date of Patent: December 4, 2001
    Assignee: Visteon Global Technologies, Inc.
    Inventors: Robert Edward Belke, Jr., Brian John Hayden, Cuong Van Pham, Rosa Lynda Nuno, Michael George Todd
  • Patent number: 5979043
    Abstract: A method of manufacturing an electronic circuit assembly that includes a number of electrically interconnected flexible films, each flexible film having a flexible electrical wiring circuit. The electrical wiring circuits are interconnected between film layers and the film layers are adhered to a molded backing structure. A first flexible film is formed with a pattern of flexible electrical wiring circuits created on at least one surface thereof. The first flexible film has a passage that provides an electrical connection through the flexible film. A second flexible film is formed with a pattern of flexible electrical wiring circuits created on a least one surface thereof. The second flexible film has an electrical interconnect feature that connects with the electrical passage on the first film and electrically connects the first film with the second film. The first flexible film is overlaid juxtaposed the second flexible film so that the passage is aligned adjacent the electrical interconnect feature.
    Type: Grant
    Filed: July 14, 1997
    Date of Patent: November 9, 1999
    Assignee: Ford Motor Company
    Inventors: Jay DeAvis Baker, Robert Edward Belke, Jr., Daniel Phillip Dailey, Andrew Z. Glovatsky, Richard Keith McMillan, II
  • Patent number: 5976391
    Abstract: A method of manufacturing an improved multi-layer printed circuit assembly having at least two conductor patterns. The method includes providing a first layer having a first metal surface a second layer having a second metal surface. A thin flexible carrier is placed between the first and second layers. The first and second layers are attached to opposite surfaces of the carrier. The first and second metal surfaces are etched to form first and second conductor patterns. The conductor patterns form the electrical traces interconnecting components on an electronic circuit assembly. The first and second conductor patterns are electrically connected to form an electronic circuit assembly that includes electronic traces on both sides of the circuit board.
    Type: Grant
    Filed: January 13, 1998
    Date of Patent: November 2, 1999
    Assignee: Ford Motor Company
    Inventors: Robert Edward Belke, Jr., Edward P. McLeskey, John Trublowski, Alice Dawn Zitzmann
  • Patent number: 5925298
    Abstract: A method and apparatus for forming a rigid circuit board has a circuit board with a reduced thickness in a bend region. The bend region may have several layers of laminate and conductive material. The circuit board is heated to the glass transition temperature which allows the circuit board to become flexible. The apparatus has a clamping member and a stationary member. The clamping member uses a shape memory alloy actuator with a transition temperature about the same as the glass transition temperature of the laminate. The actuator is used to form the bend region to a predetermined shape around the stationary member. When the circuit board is cooled, the circuit board again becomes rigid in its predetermined shape.
    Type: Grant
    Filed: June 26, 1995
    Date of Patent: July 20, 1999
    Assignee: Ford Motor Company
    Inventors: Bethany Joy Walles, Michael George Todd, Robert Edward Belke, Jr.
  • Patent number: 5909839
    Abstract: A method is provided for applying a fluid to a plurality of locations on a non-planar substrate. The apparatus used includes a movable base and an array of pins connected to the base. Each pin has a distal end which is vertically movable with respect to the base independently of the rest of the array of pins. Each distal end is adapted to transfer fluid to a location on the substrate by having a greater affinity for the fluid than the fluid has for itself and a lesser affinity for the fluid than the fluid has for the substrate. Accordingly, the distal ends may be dipped in the fluid and moved into contact with the substrate such that the distal ends may collapse toward the base as the distal ends engage the substrate to facilitate further movement of the base toward the substrate for application of fluid to each of the plurality of locations.
    Type: Grant
    Filed: May 15, 1997
    Date of Patent: June 8, 1999
    Assignee: Ford Motor Company
    Inventors: Robert Edward Belke, Jr., John Trublowski, Michael George Todd
  • Patent number: 5909012
    Abstract: A gas assisted injection molded part includes internal cavities extending between two surfaces of the part. The cavities are plated for electrical conductivity after a surface cleaning and etching process. The part may be an automobile instrument panel wherein the internal cavities are plated to create a series of "bus" conductor lines. These lines carry power, ground and/or electrical signals over relatively large distances, allowing other components to attach at points along the structure eliminating the need for discrete wiring and wire harness interconnect assemblies.
    Type: Grant
    Filed: October 21, 1996
    Date of Patent: June 1, 1999
    Assignee: Ford Motor Company
    Inventors: Michael George Todd, Charles Frederick Schweitzer, Robert Edward Belke, Jr., Tianmin Zheng
  • Patent number: 5837609
    Abstract: A fully additive method of applying a circuit pattern to a three-dimensional, nonconductive part comprises: pretreating the surface of the part; pad-printing a surface catalyst in a solvent carrier onto the surface in the shape of a desired circuit pattern; and applying an electroless copper deposit onto the surface catalyst, thereby providing a copper layer on the surface in the desired circuit pattern shape.
    Type: Grant
    Filed: January 16, 1997
    Date of Patent: November 17, 1998
    Assignee: Ford Motor Company
    Inventors: Michael George Todd, Robert Edward Belke, Jr., Andrew Zachary Glovatsky
  • Patent number: 5792677
    Abstract: In order to dissipate heat from an electronic device, there is disclosed a method whereby with the use of metal planes embedded in an insulating substrate, heat generated by the electronic device can be transported and dissipated to a remote, more desirable location.
    Type: Grant
    Filed: January 16, 1997
    Date of Patent: August 11, 1998
    Assignee: Ford Motor Company
    Inventors: Prathap Amerwai Reddy, Vivek Amir Jairazbhoy, Robert Edward Belke, Jr.
  • Patent number: 5783008
    Abstract: An apparatus and a method for embedding conductors in a structure having a signal distribution function associated therewith such as a vehicle instrument panel are disclosed. The apparatus includes an embedding tool which can be positioned in three dimensional space to embed conductors in non-planar surfaces. A method for such embedding is also disclosed.
    Type: Grant
    Filed: March 31, 1997
    Date of Patent: July 21, 1998
    Assignee: Ford Global Technologies, Inc.
    Inventors: Robert Edward Belke, Jr., Robert Bush, Brian Daugherty, Paul James Mardeusz, John Trublowski
  • Patent number: 5705104
    Abstract: A method, and an article produced according to the method, for embedding conductors in a structure having a signal distribution function associated therewith such as a vehicle instrument panel. The method includes embedding a conductor in a film, and molding a material to the film such that the material and the film integrally form the structure. The method also includes attaching a connector to the integral structure so that the connector is provided in communication with the conductor.
    Type: Grant
    Filed: May 10, 1996
    Date of Patent: January 6, 1998
    Assignee: Ford Motor Company
    Inventors: John Trublowski, Michael George Todd, Robert Edward Belke, Jr.
  • Patent number: 5655291
    Abstract: A method and apparatus for forming a rigid circuit board uses a circuit board with a reduced thickness in a bend region. The bend region may have several layers of laminate and conductive material. The circuit board is heated to the glass transition temperature which allows the circuit board to become flexible. The apparatus has two rollers used to form the bend region to a predetermined shape. When the circuit is cooled, the circuit board again becomes rigid in its predetermined shape.
    Type: Grant
    Filed: June 26, 1995
    Date of Patent: August 12, 1997
    Assignee: Ford Motor Company
    Inventors: Michael George Todd, Robert Edward Belke, Jr., Robert Joseph Gordon