Patents by Inventor Robert Ellis

Robert Ellis has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11947111
    Abstract: The present technology relates to artificial reality systems. Such systems provide projections a user can create to specify object interactions. For example, when a user wishes to interact with an object outside her immediate reach, she can use a projection to select, move, or otherwise interact with the distant object. The present technology also includes object selection techniques for identifying and disambiguating between objects, allowing a user to select objects both near and distant from the user. Yet further aspects of the present technology include techniques for interpreting various bimanual (two-handed) gestures for interacting with objects. The present technology further includes a model for differentiating between global and local modes for, e.g., providing different input modalities or interpretations of user gestures.
    Type: Grant
    Filed: September 2, 2022
    Date of Patent: April 2, 2024
    Assignee: Meta Platforms Technologies, LLC
    Inventors: Jonathan Ravasz, Etienne Pinchon, Adam Tibor Varga, Jasper Stevens, Robert Ellis, Jonah Jones, Evgenii Krivoruchko
  • Patent number: 11817154
    Abstract: Aspects of a storage device are provided that simplify the encoding or translation of optimized read voltage thresholds into a given NAND register format, which may vary depending on NAND technology, block type, page type, or gray code layout. The storage device may include a memory, a circuit that is configured to shift and combine read threshold voltage offsets into a joint read voltage threshold offset, and a controller configured to store the joint read voltage threshold offset in the memory. The circuit may be implemented in hardware of the controller. Alternatively, the controller software or firmware itself may shift and combine the read threshold voltage offsets into the joint read voltage threshold offset. As a result, the number of instructions that the controller typically performs in translating the optimized thresholds may be reduced. Moreover, the simplified translation may be scalable to different NAND technologies or page types.
    Type: Grant
    Filed: March 23, 2021
    Date of Patent: November 14, 2023
    Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
    Inventors: Kevin M. O'Toole, Robert Ellis
  • Publication number: 20230342158
    Abstract: An article of manufacture includes a non-transitory machine-readable medium. The medium includes instructions. The instructions, when read and executed by a processor, cause the processor to identify a first input instruction in a code stream to be executed, determine that the first input instruction includes an atomic operation designation, and selectively block interrupts for a duration of execution of the first input instruction and a second input instruction. The second input instruction is to immediately follow the first input instruction in the code stream.
    Type: Application
    Filed: April 19, 2023
    Publication date: October 26, 2023
    Applicant: Microchip Technology Incorporated
    Inventors: Robert Ellis, Stephen Bowling, Michael Catherwood
  • Patent number: 11775222
    Abstract: Aspects of a storage device including a master chip controller and a slave chip processor and memory including a plurality of memory locations are provided which allow for simplified processing of descriptors associated with host commands in the slave chip based on an adaptive context metadata message from the master chip. When the controller receives a host command, the controller in the master chip provides to the processor in the slave chip a descriptor associated with a host command, an instruction to store the descriptor in the one of the memory locations, and the adaptive context metadata message mapping a type of the descriptor to the one of the memory locations. The processor may then process the descriptor stored in the one of the memory locations based on the message, for example, by refraining from identifying certain information indicated in the descriptor. Reduced latency in command execution may thereby result.
    Type: Grant
    Filed: August 4, 2022
    Date of Patent: October 3, 2023
    Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
    Inventors: Todd Lindberg, Robert Ellis, Kevin O'Toole, Vivek Shivhare
  • Patent number: 11726717
    Abstract: Aspects of a storage device including a memory and a controller are provided which allow for detection of dropped commands based on a die status (ready/busy status) of a command received from a host device. The memory may include dies controlled by chip-enables (CE). After selecting a die using CE, the controller waits between a minimum and maximum time after receiving the command to query the die status, where the minimum time is the time by which the command is expected to begin execution and the maximum time is the shortest time by which the command is expected to complete execution. The controller queries the die status after waiting the time period. If the die status is ready when it should have read busy, the controller detects that the command associated with the data is dropped and requests the host device to reissue the command.
    Type: Grant
    Filed: September 30, 2021
    Date of Patent: August 15, 2023
    Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
    Inventors: Robert Ellis, Kevin O'Toole, Jacob Schmier
  • Patent number: 11709785
    Abstract: Aspects of a storage device including a memory and an encryption core are provided. The storage device may be configured for providing secure data storage, as well as one or more post-processing operations to be performed with the data. The encryption core, which may be configured to decrypt data, may control execution of one or more post-processing operations using the data. A read command received from a host device may include a tag associated with data identified by the read command. When encrypted data is retrieved from memory according to the read command, the encryption core may decrypt the encrypted data and provide the decrypted data for post-processing based on the tag. A corresponding post-processing operation may return a result when executed using the decrypted data. Rather than raw data identified by the read command, the result may be delivered to the host device in response to the read command.
    Type: Grant
    Filed: June 26, 2020
    Date of Patent: July 25, 2023
    Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
    Inventors: Robert Ellis, Brent Jacobs, Kevin O'Toole
  • Patent number: 11655309
    Abstract: A shaped article comprising a polymer-based resin derived from cellulose, wherein the polymer-based resin has an HDT of at least 95° C., a bio-derived content of at least 20 wt %, a notched izod impact strength of greater than 80 J/m and at least one of the following properties chosen from: flexural modulus of greater than 1900 MPa; a spiral flow length or at least 3.0 cm; a flex creep deflection of less than 12 mm; a transmission of at least 70%; a ?E value of less than 25; or an L* color of at least 85.
    Type: Grant
    Filed: November 9, 2017
    Date of Patent: May 23, 2023
    Assignee: Eastman Chemical Company
    Inventors: Wenlai Feng, Haining An, Michael Eugene Donelson, Thomas Joseph Pecorini, Robert Ellis McCrary, Douglas Weldon Carico, Spencer Allen Gilliam
  • Patent number: 11620234
    Abstract: Aspects of a storage device including a memory and a controller are provided that allow for storage of tags identifying data types and sequence numbers with data to facilitate data recovery and system integrity checks following a power failure or other system failure event. The controller is configured during a write operation to include a tag in the data identifying the data type as a host write, a recycle write, or another internal write. Following a system failure event, the controller is configured to read the tags to identify the data type in the write. Based on the tags, the controller is configured to properly rebuild or update a logical-to-physical (L2P) table of the storage device to assign correct logical addresses to the most recent data during data recovery, as well as to verify correct logical addresses during system integrity checks.
    Type: Grant
    Filed: June 29, 2020
    Date of Patent: April 4, 2023
    Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
    Inventors: Mark J. Dancho, Robert Ellis, Kevin O'Toole
  • Publication number: 20220414999
    Abstract: The present technology relates to artificial reality systems. Such systems provide projections a user can create to specify object interactions. For example, when a user wishes to interact with an object outside her immediate reach, she can use a projection to select, move, or otherwise interact with the distant object. The present technology also includes object selection techniques for identifying and disambiguating between objects, allowing a user to select objects both near and distant from the user. Yet further aspects of the present technology include techniques for interpreting various bimanual (two-handed) gestures for interacting with objects. The present technology further includes a model for differentiating between global and local modes for, e.g., providing different input modalities or interpretations of user gestures.
    Type: Application
    Filed: September 2, 2022
    Publication date: December 29, 2022
    Applicant: Meta Platforms Technologies, LLC
    Inventors: Jonathan RAVASZ, Etienne PINCHON, Adam Tibor VARGA, Jasper STEVENS, Robert ELLIS, Jonah JONES, Evgenii KRIVORUCHKO
  • Publication number: 20220374351
    Abstract: Aspects of a storage device including a master chip controller and a slave chip processor and memory including a plurality of memory locations are provided which allow for simplified processing of descriptors associated with host commands in the slave chip based on an adaptive context metadata message from the master chip. When the controller receives a host command, the controller in the master chip provides to the processor in the slave chip a descriptor associated with a host command, an instruction to store the descriptor in the one of the memory locations, and the adaptive context metadata message mapping a type of the descriptor to the one of the memory locations. The processor may then process the descriptor stored in the one of the memory locations based on the message, for example, by refraining from identifying certain information indicated in the descriptor. Reduced latency in command execution may thereby result.
    Type: Application
    Filed: August 4, 2022
    Publication date: November 24, 2022
    Inventors: Todd LINDBERG, Robert ELLIS, Kevin O'TOOLE, Vivek SHIVHARE
  • Patent number: 11468644
    Abstract: The present technology relates to artificial reality systems. Such systems provide projections a user can create to specify object interactions. For example, when a user wishes to interact with an object outside her immediate reach, she can use a projection to select, move, or otherwise interact with the distant object. The present technology also includes object selection techniques for identifying and disambiguating between objects, allowing a user to select objects both near and distant from the user. Yet further aspects of the present technology include techniques for interpreting various bimanual (two-handed) gestures for interacting with objects. The present technology further includes a model for differentiating between global and local modes for, e.g., providing different input modalities or interpretations of user gestures.
    Type: Grant
    Filed: September 9, 2020
    Date of Patent: October 11, 2022
    Assignee: Meta Platforms Technologies, LLC
    Inventors: Jonathan Ravasz, Etienne Pinchon, Adam Tibor Varga, Jasper Stevens, Robert Ellis, Jonah Jones, Evgenii Krivoruchko
  • Publication number: 20220310172
    Abstract: Aspects of a storage device are provided that simplify the encoding or translation of optimized read voltage thresholds into a given NAND register format, which may vary depending on NAND technology, block type, page type, or gray code layout. The storage device may include a memory, a circuit that is configured to shift and combine read threshold voltage offsets into a joint read voltage threshold offset, and a controller configured to store the joint read voltage threshold offset in the memory. The circuit may be implemented in hardware of the controller. Alternatively, the controller software or firmware itself may shift and combine the read threshold voltage offsets into the joint read voltage threshold offset. As a result, the number of instructions that the controller typically performs in translating the optimized thresholds may be reduced. Moreover, the simplified translation may be scalable to different NAND technologies or page types.
    Type: Application
    Filed: March 23, 2021
    Publication date: September 29, 2022
    Inventors: Kevin M. O'Toole, Robert Ellis
  • Patent number: 11442852
    Abstract: Aspects of a storage device including a master chip controller and a slave chip processor and memory including a plurality of memory locations are provided which allow for simplified processing of descriptors associated with host commands in the slave chip based on an adaptive context metadata message from the master chip. When the controller receives a host command, the controller in the master chip provides to the processor in the slave chip a descriptor associated with a host command, an instruction to store the descriptor in the one of the memory locations, and the adaptive context metadata message mapping a type of the descriptor to the one of the memory locations. The processor may then process the descriptor stored in the one of the memory locations based on the message, for example, by refraining from identifying certain information indicated in the descriptor. Reduced latency in command execution may thereby result.
    Type: Grant
    Filed: June 25, 2020
    Date of Patent: September 13, 2022
    Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
    Inventors: Todd Lindberg, Robert Ellis, Kevin O'Toole, Vivek Shivhare
  • Patent number: 11429485
    Abstract: Memories using end-to-end data protection using physical location checks are described. In one aspect, a storage device includes non-volatile memory and a controller coupled to the memory. The controller may receive a write instruction including a data word and a logical address, include metadata with the word including error correction data, identify a physical address in a mapping table based on the logical address, generate a tag corresponding to the physical address, and replace the error correction data with the generated tag or a value based thereon before writing the data word to memory. In one embodiment, the controller may generate the tag concurrently with performing a logical error check using the error correction data.
    Type: Grant
    Filed: June 24, 2021
    Date of Patent: August 30, 2022
    Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
    Inventors: Atif Hussain, Robert Ellis, Vivek Shivhare, Stephen Gold
  • Patent number: 11422669
    Abstract: An artificial reality system is described that renders, presents, and controls user interface elements within an artificial reality environment, and performs actions in response to one or more detected gestures of the user. In one example, an artificial reality system comprises a head-mounted display configured to output artificial reality content; a stylus; a stylus action detector configured to detect movement of the stylus, detect a stylus selection action, and after detecting the stylus selection action, detect further movement of the stylus; a UI engine configured to generate stylus movement content in response to detecting movement of the stylus, and generate a UI input element in response to detecting the stylus selection action; and a rendering engine configured to render the stylus movement content and the UI input element as overlays to the artificial reality content, and update the stylus movement content based on the further movement of the stylus.
    Type: Grant
    Filed: June 7, 2019
    Date of Patent: August 23, 2022
    Assignee: FACEBOOK TECHNOLOGIES, LLC
    Inventors: Jonathan Ravasz, Jasper Stevens, Adam Tibor Varga, Etienne Pinchon, Simon Charles Tickner, Jennifer Lynn Spurlock, Kyle Eric Sorge-Toomey, Robert Ellis, Barrett Fox
  • Publication number: 20220244834
    Abstract: An artificial reality system is described that renders, presents, and controls user interface elements within an artificial reality environment, and performs actions in response to one or more detected gestures of the user. In one example, an artificial reality system comprises an image capture device configured to capture image data representative of a physical environment; a head-mounted display (HMD) configured to output artificial reality content; a gesture detector configured to identify, from the image data, a gesture comprising a motion of two fingers from a hand to form a pinching configuration and a subsequent pulling motion while in the pinching configuration; a user interface (UI) engine configured to generate a UI input element in response to identifying the gesture; and a rendering engine configured to render the UI input element as an overlay to at least some of the artificial reality content.
    Type: Application
    Filed: April 12, 2022
    Publication date: August 4, 2022
    Inventors: Jonathan Ravasz, Jasper Stevens, Adam Tibor Varga, Etienne Pinchon, Simon Charles Tickner, Jennifer Lynn Spurlock, Kyle Eric Sorge-Toomey, Robert Ellis, Barrett Fox
  • Patent number: 11354041
    Abstract: Aspects of a storage device including a memory and a controller are provided which allow for reduction of latency and improve QoS for reads performed in memory locations such as multi-plane dies sharing a bus with the controller. When the controller receives a host read command, the controller sends a read sense command to a memory location to perform a read operation. The controller also sends a status polling command to the memory location to check die status. While the read operation is being performed, and while other read operations are being performed in other memory locations, the controller refrains from polling this memory location and the other memory locations for die status. Rather, the controller continuously toggles a read enable input to the memory location until the read operation is complete and the die status is ready, after which the controller receives data from the memory location.
    Type: Grant
    Filed: June 12, 2020
    Date of Patent: June 7, 2022
    Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
    Inventors: Todd Lindberg, Robert Ellis, Kevin O'Toole
  • Patent number: 11347581
    Abstract: Aspects of a storage device including a controller memory, a die memory, and a plurality of accumulators corresponding to individual DQs are provided for accelerated DQ training and error detection. A controller stores first data in the controller memory, transfers second data to the die memory over an n-bit bus, and receives n bits of the second data from the die memory based on a DQS. The controller then compares n bits of the first data with n bits of the second data to produce n bit results received into respective accumulators, and the controller simultaneously updates different accumulators in response to bit mismatches. During DQ training, if an accumulator value meets a mismatch threshold, the controller modifies a DQS-DQ timing accordingly. During error detection of a read scrambled page, if an accumulator value does not meet an entropy threshold, the controller identifies an error associated with the page.
    Type: Grant
    Filed: April 27, 2020
    Date of Patent: May 31, 2022
    Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
    Inventors: Robert Ellis, Atif Hussain, Venugopal Garuda, Kevin O'Toole, Todd Lindberg
  • Patent number: 11334212
    Abstract: An artificial reality system is described that renders, presents, and controls user interface elements within an artificial reality environment, and performs actions in response to one or more detected gestures of the user. In one example, an artificial reality system comprises an image capture device configured to capture image data representative of a physical environment; a head-mounted display (HMD) configured to output artificial reality content; a gesture detector configured to identify, from the image data, a gesture comprising a motion of two fingers from a hand to form a pinching configuration and a subsequent pulling motion while in the pinching configuration; a user interface (UI) engine configured to generate a UI input element in response to identifying the gesture; and a rendering engine configured to render the UI input element as an overlay to at least some of the artificial reality content.
    Type: Grant
    Filed: June 7, 2019
    Date of Patent: May 17, 2022
    Assignee: Facebook Technologies, LLC
    Inventors: Jonathan Ravasz, Jasper Stevens, Adam Tibor Varga, Etienne Pinchon, Simon Charles Tickner, Jennifer Lynn Spurlock, Kyle Eric Sorge-Toomey, Robert Ellis, Barrett Fox
  • Publication number: 20220130121
    Abstract: The present technology relates to artificial reality systems. Such systems provide projections a user can create to specify object interactions. For example, when a user wishes to interact with an object outside her immediate reach, she can use a projection to select, move, or otherwise interact with the distant object. The present technology also includes object selection techniques for identifying and disambiguating between objects, allowing a user to select objects both near and distant from the user. Yet further aspects of the present technology include techniques for interpreting various bimanual (two-handed) gestures for interacting with objects. The present technology further includes a model for differentiating between global and local modes for, e.g., providing different input modalities or interpretations of user gestures.
    Type: Application
    Filed: January 10, 2022
    Publication date: April 28, 2022
    Inventors: Jonathan RAVASZ, Etienne PINCHON, Adam Tibor VARGA, Jasper STEVENS, Robert ELLIS, Jonah JONES, Evgenii KRIVORUCHKO