Patents by Inventor Robert F. Cook
Robert F. Cook has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Method and system for dicing wafers, and semiconductor structures incorporating the products thereof
Patent number: 6915795Abstract: A method and system for dicing a semiconductor wafer providing a structure with greatly reduced backside chipping and cracking, as well as increased die strength. Semiconductor chip structures obtained from wafers diced according to this invention are also encompassed.Type: GrantFiled: May 30, 2003Date of Patent: July 12, 2005Assignee: International Business Machines CorporationInventors: Donald W. Brouillette, Robert F. Cook, Thomas G. Ference, Wayne J. Howell, Eric G. Liniger, Ronald L. Mendelson -
Patent number: 6726400Abstract: Vehicle arresting beds, for installation at the ends of aircraft runways, are effective to safely decelerate aircraft entering the bed. The arresting bed is assembled of a large number of blocks of cellular concrete having predetermined compressive gradient strength, so that aircraft landing gear is subjected to drag forces effective to slow a variety of types of aircraft, while providing deceleration within a safe range of values. An arresting bed typically includes an entry region of a depth increasing from 9 to 24 inches formed of blocks having a first compressive gradient strength. A second region, which may be tapered into the first region and increase in depth to 30 inches, is formed of blocks having a greater compressive gradient strength. An aircraft thus experiences increasing drag forces while it travels through the bed, to provide an arresting capability suitable for a variety of aircraft.Type: GrantFiled: May 19, 2000Date of Patent: April 27, 2004Assignee: Engineered Arresting Systems CorporationInventors: Richard D. Angley, Michael S. Ciesielski, Christopher T. Dial, Peter T. Mahal, Robert F. Cook
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Method and system for dicing wafers, and semiconductor structures incorporating the products thereof
Publication number: 20030211707Abstract: A method and system for dicing a semiconductor wafer providing a structure with greatly reduced backside chipping and cracking, as well as increased die strength. Semiconductor chip structures obtained from wafers diced according to this invention are also encompassed.Type: ApplicationFiled: May 30, 2003Publication date: November 13, 2003Inventors: Donald W. Brouillette, Robert F. Cook, Thomas G. Ference, Wayne J. Howell, Eric G. Liniger, Ronald L. Mendelson -
Patent number: 6600213Abstract: A semiconductor structure with greatly reduced backside chipping and cracking, as well as increased die strength, accommodation of compact assembly with a carrier such as another semiconductor chip, and resistance to package damage is provided by dicing chips from a wafer in a manner that chamfers edges of the chips. Similar advantages are obtained in multi-chip structure.Type: GrantFiled: May 15, 2001Date of Patent: July 29, 2003Assignee: International Business Machines CorporationInventors: Donald W. Brouillette, Robert F. Cook, Thomas G. Ference, Wayne J. Howell, Eric G. Liniger, Ronald L. Mendelson
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Method and system for dicing wafers, and semiconductor structures incorporating the products thereof
Publication number: 20010023979Abstract: A method and system for dicing a semiconductor wafer providing a structure with greatly reduced backside chipping and cracking, as well as increased die strength. Semiconductor chip structures obtained from wafers diced according to this invention are also encompassed.Type: ApplicationFiled: May 15, 2001Publication date: September 27, 2001Inventors: Donald W. Brouvillette, Robert F. Cook, Thomas G. Ference, Wayne J. Howell, Eric G. Liniger, Ronald L. Mendelson -
Method and system for dicing wafers, and semiconductor structures incorporating the products thereof
Patent number: 6271102Abstract: A method and system for dicing a semiconductor wafer providing a structure with greatly reduced backside chipping and cracking, as well as increased die strength. Semiconductor chip structures obtained from wafers diced according to this invention are also encompassed.Type: GrantFiled: February 27, 1998Date of Patent: August 7, 2001Assignee: International Business Machines CorporationInventors: Donald W. Brouillette, Robert F. Cook, Thomas G. Ference, Wayne J. Howell, Eric G. Liniger, Ronald L. Mendelson -
Patent number: 6222145Abstract: A method for sorting integrated circuit chips. At least one physical defect is detected in the semiconductor chips. The semiconductor chips are sorted based upon the physical defect.Type: GrantFiled: October 29, 1998Date of Patent: April 24, 2001Assignee: International Business Machines CorporationInventors: Robert F. Cook, Eric G. Liniger, Ronald L. Mendelson, Dean R. Sanders
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Patent number: 6174814Abstract: The propagation of a crack from the surface of the dielectric layer of an integrated circuit, through to the underlying circuit elements, is prevented by controlling the interface between the outermost, dielectric layer or layers and the inner layer or layers of the integrated circuit construction. The interface is weakened so that a crack that encounters the interface is caused to propagate in a horizontal manner, along the interface, preventing propagation of the crack in a direction that would be harmful to the manufactured article. This is preferably accomplished with multiple layers of material, each of which is made capable of redirecting (deflecting) the crack. Deflection of the crack, and arrest of the deflected crack along the interface, is made possible by controlling the fracture resistance of the interface.Type: GrantFiled: April 25, 2000Date of Patent: January 16, 2001Assignee: International Business Machines CorporationInventors: Robert F. Cook, Eduardo Garcia, Nancy A. Greco, Stephen E. Greco, Ernest N. Levine
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Patent number: 6091131Abstract: The propagation of a crack from the surface of the dielectric layer of an integrated circuit, through to the underlying circuit elements, is prevented by controlling the interface between the outermost, dielectric layer or layers and the inner layer or layers of the integrated circuit construction. The interface is weakened so that a crack that encounters the interface is caused to propagate in a horizontal manner, along the interface, preventing propagation of the crack in a direction that would be harmful to the manufactured article. This is preferably accomplished with multiple layers of material, each of which is made capable of redirecting (deflecting) the crack. Deflection of the crack, and arrest of the deflected crack along the interface, is made possible by controlling the fracture resistance of the interface.Type: GrantFiled: April 28, 1998Date of Patent: July 18, 2000Assignee: International Business Machines CorporationInventors: Robert F. Cook, Eduardo Garcia, Nancy A. Greco, Stephen E. Greco, Ernest N. Levine
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Patent number: 5885025Abstract: Vehicle arresting beds, for installation at the ends of aircraft runways, are effective to safely decelerate aircraft entering the bed. The arresting bed is assembled of a large number of blocks of cellular concrete having predetermined compressive gradient strength, so that aircraft landing gear is subjected to drag forces effective to slow a variety of types of aircraft, while providing deceleration within a safe range of values. An arresting bed typically includes an entry region of a depth increasing from 9 to 24 inches formed of blocks having a first compressive gradient strength. A second region, which may be tapered into the first region and increase in depth to 30 inches, is formed of blocks having a greater compressive gradient strength. An aircraft thus experiences increasing drag forces while it travels through the bed, to provide an arresting capability suitable for a variety of aircraft.Type: GrantFiled: February 7, 1997Date of Patent: March 23, 1999Assignee: Datron Inc.Inventors: Richard D. Angley, Michael S. Ciesielski, Christopher T. Dial, Peter T. Mahal, Robert F. Cook
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Patent number: 5789681Abstract: Arresting material test apparatus, test probes and test methods enable testing of compressive gradient strength of cellular concrete, and materials having similar characteristics, on a continuous basis from the surface of a section to a typical internal penetration depth of at least 60 percent of thickness. Previous testing of cellular concrete typically focused on testing to confirm a minimum structural strength prior to structural failure or shattering of a test sample. For an aircraft arresting bed, for example, cellular concrete must exhibit a compressive gradient strength in a relatively narrow precalculated range continuously from the surface to penetration depth equal to 60 to 80 percent of sample thickness. Precalculated and controlled compressive gradient strength is critical to enabling an aircraft to be safely stopped within a set distance, without giving rise to drag forces exceeding main landing gear structural limits.Type: GrantFiled: February 7, 1997Date of Patent: August 4, 1998Assignee: Datron Inc.Inventors: Richard D. Angley, Michael S. Ciesielski, Christopher T. Dial, Peter T. Mahal, Robert F. Cook
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Patent number: 4645286Abstract: A coupling device which allows for quickly changing electrical fixtures without rewiring. The quick change mounting fixture comprises a combined electrical and mechanical two-piece male and female fastening device. The invention allows for consumer as well as professional installation and detachment of fixtures by providing an easy and safe method. All wires and contacts are self contained and shielded from accidental contact. The invention comprises a female receptacle plate for mounting to a standard ceiling or wall mounted electrical junction box, a male tap support plate which also functions as a fixture support, a block terminal support, where contacts and wire routes are located, and a shield cover.Type: GrantFiled: February 10, 1983Date of Patent: February 24, 1987Assignee: Elliot IsbanInventors: Elliot Isban, Charles F. Stephenson, Robert F. Cook