Patents by Inventor Robert F. Gaertner

Robert F. Gaertner has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4233558
    Abstract: A dual section power supply, one section for supplying high voltage dc po and the other section for supplying low voltage dc power, are each connected to a common ac source. The high voltage section employs a phase-controlled rectifier, the control circuit for which employs logic signal development using timer techniques dependent on the amplitude of voltage deviation from the intended regulated output level. Each of two low voltage sections employs a power switch controlled by sampling and pulse steering techniques to effect fixed high frequency, variable duty cycle switching. An inhibit input is supplied from each of the low voltage sections to the high voltage section to prevent a high voltage output to the load in the absence of low voltage development.
    Type: Grant
    Filed: September 22, 1978
    Date of Patent: November 11, 1980
    Assignee: The United States of America as represented by the Secretary of the Navy
    Inventor: Robert F. Gaertner
  • Patent number: 4213164
    Abstract: A protection circuit for producing one or more triggers in the presence of a monitored overvoltage condition employing a complex voltage divider network including slow-acting breakover semiconductor devices for sensing ac voltage overloads in either or both polarities thereof, and operating gated semiconductors by controlling the voltages applied to both the gates and the main terminals thereof, which, in turn, discharge capacitors for trigger production. Monitoring may be with respect to supply voltage, power supply output voltage or one or more independent voltages.
    Type: Grant
    Filed: June 14, 1978
    Date of Patent: July 15, 1980
    Assignee: Esquire, Inc.
    Inventor: Robert F. Gaertner
  • Patent number: 4209738
    Abstract: A regulation circuit for providing timing gate signals to the dc power section of a power supply, the regulation circuit utilizing phase angle conduction of a programmable unijunction transistor. The conduction angle is determined by the occurrence of the cycles of the ac source voltage unless earlier conduction is determined by the sensed dc voltage. Early conduction occurs when the control voltage to the PUT is allowed to build up beyond a predetermined level when the sensed dc voltage is low. When the sensed dc voltage is high, an electronic switch closes to discharge a storage element to prevent control voltage build up and, hence, early conduction. Ac source voltage failure also causes closing of the electronic switch to prevent undue regulation of the power section output at such times and to permit storage capacitors therein to maintain a dc output until source voltage is reestablished.
    Type: Grant
    Filed: June 22, 1977
    Date of Patent: June 24, 1980
    Assignee: Esquire, Inc.
    Inventors: Eric L. H. Nuver, Robert F. Gaertner
  • Patent number: 4204148
    Abstract: A regulation circuit for providing timing gate signals to the dc power section of a power supply, the regulation circuit utilizing phase angle conduction of a programmable unijunction transistor. The conduction angle is determined by the occurrence of the cycles of the ac source voltage unless earlier conduction is determined by the sensed dc voltage. Early conduction occurs when the control voltage to the PUT is allowed to build up beyond a predetermined level when the sensed dc voltage is low. When the sensed dc voltage is high, an electronic switch closes to discharge a storage element to prevent control voltage build up and, hence, early conduction. When there is an ac source voltage outage, a diode connected to the control voltage output conducts to keep the control voltage to zero and hence closing of the electronic switch to prevent undue regulation of the power section output at such times and to permit storage capacitors therein to maintain a dc output until source voltage is reestablished.
    Type: Grant
    Filed: July 24, 1978
    Date of Patent: May 20, 1980
    Assignee: Esquire, Inc.
    Inventor: Robert F. Gaertner