Abstract: A longitudinally extending cross-flow liner within a longitudinally extending cylindrical reaction vessel cooperates with at least one longitudinally extending gas injector within the cross-flow liner to provide transversely flowing gas across the surfaces of vertically oriented semiconductor wafers in such a way as to substantially eliminate both depletion phenomenon and downstream wafer pollution caused from particulates, unreacted reactant gas, and other contaminants and to provide uniformly coated wafers in a batch and repeatability batch to batch.

Abstract: A system for chemical vapor deposition of a material onto the surface of a substrate wherein an inner reactor tube is disposed within an outer furnace tube to provide a plenum chamber between the two tubes. The reactor tube is provided with a series of axially arranged openings to provide gas communication between the inside of the reactor tube and the plenum chamber. Structure is provided for introducing a first reactant gas into the plenum chamber from which a portion passes into the reactor chamber and structure is provided for introducing a second reactant gas directly into the reactor chamber, where a portion reacts with the first reactant gas to deposit a layer of material on substrates present in the reactor chamber. Separate lines are provided for exhausting unreacted first reactant gases from the plenum chamber and for exhausting unreacted second reactant gases from the reaction chamber.

Abstract: A semi-cylindrical low-profile cantilevered paddle of refractory material is separably clamped to a cantilevered arm fastened to a movable boat-loader. A clamping mechanism is disclosed that preferably includes spaced brackets fastened to the arm defining retaining loops for slidably receiving the paddle. A flexible, stress-relief saddle portion is provided on one of the brackets. The rugged and breakage-resistant semi-cylindrical paddle is inexpensive to procure and replace, and its low profile makes it possible to adapt existing CVD furnaces for operation with larger semiconductor wafers.

Abstract: A novel modular V-CVD diffusion furnace includes a cylindrical quartz diffusion tube having integral end flanges, a first metallic sealing plate having gas ports removably fastened to one flange, a second metallic sealing plate having a plurality of precisely aligned gas injection tube receiving apertures removably fastened to the other flange, a like plurality of gas injection tubes slidably mounted in and sealed to corresponding gas injection tube receiving apertures, and a cylindrical quartz liner slidably mounted in the cylindrical diffusion tube.

Abstract: A method is disclosed for providing substantially effluent-waste free vacuum chemical vapor deposition of thin-film on semiconductor substrates. A first comparatively low efficiency diffusion furnace deposits selected thin-film on the semiconductor substrates. A second comparatively high-efficiency diffusion furnace operative in response to the effluent-waste stream of the first diffusion furnace deposits substantially all of the effluent-waste on throw-away baffles.

Abstract: A novel apparatus for forming depletion-free uniform thickness CVD thin-film on semiconductor wafers includes a diffusion furnace, a boat loader coupled to the furnace for loading and removing a batch of semiconductor wafers into and out of the furnace, and a semiconductor wafer support boat for removably retaining a plurality of vertically oriented semiconductor wafers on the boat. The boat includes supporting surfaces so arranged that depletion-free uniform thickness thin-film is provided on both sides of each of the vertically oriented wafers. The semiconductor wafer support boat preferably includes two laterally spaced elongated rails each having an undulatory longitudinal section defining plural ridge portions spaced apart by plural valley portions. The ridges on one of the rails are provided with transverse slots that cooperate with confronting transverse slots provided on the confronting ridge portions on the other one of the rails to define a plurality of wafer edge receiving channels.