Abstract: An event based test system for testing an IC device under test (DUT) designed under an automatic electronic design (EDA) environment. The event based test system includes an event memory for storing event data derived directly from simulation of design data for an intended IC in the EDA environment where the event data to denote each event is formed with time index indicating a time length from a predetermined point and an event type indicating a type of change at an event, an event generation unit for generating test vectors based on the event data where waveform of each vector is determined by the event type and a timing of the waveform is determined by accumulating the time index of previous events, and means for supplying test vectors to the DUT and evaluating response outputs of the DUT at predetermined timings.

Abstract: A universal IC test system is designed to function both an event tester and a cyclized tester. The universal test system is comprised of an event tester for testing DUT by test vectors produced based on event data derived directly from simulation of design data of DUT produced in an EDA environment a cyclized tester for testing DUT by test vectors produced based on test data formulated in a cyclized format in which each test vector is defined by a waveform, a test rate, and a timing with respect to the test rate, a pin-electronics for applying the test vector to DUT and comparing a response output of DUT, and means for changing a tester mode between an event tester mode and a cyclized tester mode thereby testing DUT either by the event tester or the cyclized tester, or by both testers.

Abstract: An event based test system for testing an IC device under test (DUT) designed under an automatic electronic design (EDA) environment. The event based test system includes an event memory for storing event data derived directly from simulation of design data for an intended IC in the EDA environment wherein the event data to denote each event is formed with time index indicating a time length from a predetermined point and an event type indicating a type of change at an event, an event generation unit for generating test vectors based on the event data from the event memory where waveform of each vector is determined by the event type and a timing of the waveform is determined by accumulating the time index of previous events, and means for supplying test vectors to the DUT and evaluating response outputs of the DUT at predetermined timings.

Abstract: An emulator software in a semiconductor test system for emulating hardware in the semiconductor test system as well as a semiconductor device to be tested without need to use an actual test system hardware. The emulator software includes an emulator unit which emulates a function of each hardware unit of the test system, a device emulator which emulates a function of a semiconductor device to be tested, a data collecting part for acquiring data from the emulator unit necessary for carrying out a test program, and a device test emulator which generates a test signal to be applied to the device emulator based on the acquired data and compares the resultant signal from the device emulator with the expected data and stores the comparison result therein.

Abstract: A software structure in a semiconductor test system for easily modifying and transferring data for controlling a hardware when the hardware is changed or replaced.