Patents by Inventor Robert FAUL

Robert FAUL has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240148252
    Abstract: A neurosurgery system for probing brain tissue of a patient for tumorous tissue. The system including a suction tool, an excitation source, an optical instrument, and a controller. The suction tool including a suction cannula defining a lumen, an optical fiber configured to transmit fluorescence emitted by the brain tissue; and an indicator configured to selectively emit visible light. An excitation source is configured to emit an excitation light having a wavelength to induce the fluorescence in the tumorous tissue. The optical instrument is coupled to the optical fiber. The optical instrument configured to convert the fluorescence emitted by the brain tissue and transmitted by the optical and configured to determine that the brain tissue is tumorous based on the electrical signal and activate the indicator based on the determination.
    Type: Application
    Filed: March 14, 2022
    Publication date: May 9, 2024
    Applicant: Stryker European Operations Limited
    Inventors: Kevin Buckley, Gerard Nunan, Stephen Faul, David Eustace, Kevin Manley, Robert Mitchell Baldwin, David Tallon
  • Patent number: 11764122
    Abstract: A flexible foil-based package is disclosed which comprises at least one flexible foil substrate on which at least one electronic device is mounted in flip-chip mounting technology. The flexible foil substrate is bent so that a recess is created in which the electronic device is arranged. A casting compound is applied to cover the electronic device.
    Type: Grant
    Filed: February 27, 2020
    Date of Patent: September 19, 2023
    Assignee: Fraunhofer-Gesellschaft zur Foerderung der angewandten Forschung e.V.
    Inventor: Robert Faul
  • Patent number: 11615996
    Abstract: A foil package includes a first foil substrate with a first and a second main surface, a second foil substrate with a first and a second main surface, wherein its first main surface is arranged facing the second main surface of the first foil substrate. The foil package includes at least one electronic device arranged between the first foil substrate and the second foil substrate and a first electrically conductive layer structure structured into a plurality of first partial areas arranged on the second main surface of the first foil substrate. The plurality of partial areas incompletely cover the second main surface of the first foil substrate. The at least one electronic device includes a terminal side and a side opposite to the terminal side.
    Type: Grant
    Filed: February 28, 2020
    Date of Patent: March 28, 2023
    Assignee: Fraunhofer-Gesellschaft zur Foerderung der angewandten Forschung e.V.
    Inventor: Robert Faul
  • Patent number: 11521919
    Abstract: The invention relates to a foil-based package with at least one foil substrate having an electrically conductive layer arranged thereon which is patterned to provide a first electrically conducting portion and a second electrically conducting portion, which is coplanar to the first electrically conducting portion, and a third electrically conducting portion, which is coplanar to the first electrically conducting portion, the first electrically conducting portion being arranged between the second and third electrically conducting portions. In accordance with the invention, the first electrically conducting portion is implemented to be a signal-guiding waveguide for high-frequency signals and the second electrically conducting portion, which is coplanar to the first electrically conducting portion, and the third electrically conducting portion, which is coplanar to the first electrically conducting portion, form an equipotential surface.
    Type: Grant
    Filed: February 27, 2020
    Date of Patent: December 6, 2022
    Assignee: Fraunhofer-Gesellschaft zur Foerderung der angewandten Forschung e.V.
    Inventor: Robert Faul
  • Publication number: 20200279785
    Abstract: A foil package includes a first foil substrate with a first and a second main surface, a second foil substrate with a first and a second main surface, wherein its first main surface is arranged facing the second main surface of the first foil substrate. The foil package includes at least one electronic device arranged between the first foil substrate and the second foil substrate and a first electrically conductive layer structure structured into a plurality of first partial areas arranged on the second main surface of the first foil substrate. The plurality of partial areas incompletely cover the second main surface of the first foil substrate. The at least one electronic device includes a terminal side and a side opposite to the terminal side.
    Type: Application
    Filed: February 28, 2020
    Publication date: September 3, 2020
    Inventor: Robert FAUL
  • Publication number: 20200279787
    Abstract: The invention relates to a foil-based package having at least one foil substrate having an electrically conductive layer arranged thereon, at least one electronic device having a device terminal pad having at least one device terminal pad, and a plurality of package terminal pads arranged on a package terminal side. The foil substrate includes a first foil portion and a second foil portion, the first foil portion extending along a first foil plane and the second foil portion extending along a second foil plane parallel to the first foil plane, the first foil plane and the second foil plane being offset relative to each other so that the foil substrate forms a recess within which the at least one electronic device is arranged.
    Type: Application
    Filed: February 27, 2020
    Publication date: September 3, 2020
    Inventor: Robert FAUL
  • Publication number: 20200279797
    Abstract: The invention relates to a foil-based package with at least one foil substrate having an electrically conductive layer arranged thereon which is patterned to provide a first electrically conducting portion and a second electrically conducting portion, which is coplanar to the first electrically conducting portion, and a third electrically conducting portion, which is coplanar to the first electrically conducting portion, the first electrically conducting portion being arranged between the second and third electrically conducting portions. In accordance with the invention, the first electrically conducting portion is implemented to be a signal-guiding waveguide for high-frequency signals and the second electrically conducting portion, which is coplanar to the first electrically conducting portion, and the third electrically conducting portion, which is coplanar to the first electrically conducting portion, form an equipotential surface.
    Type: Application
    Filed: February 27, 2020
    Publication date: September 3, 2020
    Inventor: Robert FAUL
  • Patent number: 8563358
    Abstract: A method of producing a chip package includes providing a substrate comprising a first recess having a recess bottom and recess side walls. A chip comprising a chip backside is introduced into the recess such that the chip does not protrude from the recess and such that a gap remains between the recess side walls and the chip, the chip backside being attached to the recess bottom. The gap is filled with a filler material.
    Type: Grant
    Filed: October 18, 2011
    Date of Patent: October 22, 2013
    Assignee: Fraunhofer-Gesellschaft zur Foerderung der Angewandten Forschung E.V.
    Inventors: Christof Landesberger, Robert Faul
  • Publication number: 20120091594
    Abstract: A method of producing a chip package includes providing a substrate comprising a first recess having a recess bottom and recess side walls. A chip comprising a chip backside is introduced into the recess such that the chip does not protrude from the recess and such that a gap remains between the recess side walls and the chip, the chip backside being attached to the recess bottom. The gap is filled with a filler material.
    Type: Application
    Filed: October 18, 2011
    Publication date: April 19, 2012
    Inventors: Christof LANDESBERGER, Robert FAUL