Patents by Inventor Robert Fesler

Robert Fesler has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Cross-coupled, narrow pulse, high voltage level shifting circuit with voltage domain common mode rejection
    Patent number: 10116301
    Abstract: A system for high voltage level shifting includes a level shifting circuit having a high side circuit that receives a mixed signal having a common mode signal and a differential mode signal, and to attenuate the common mode signal in the mixed signal to generate an adjusted signal. The high side circuit generates a high output signal at a high output node in response to the adjusted signal. The system further includes a high side high voltage power transistor having a gate connected to the high output node of the high side circuit. The high side high voltage power transistor configured to provide a high portion of an output signal on a first output node in response to the high output signal.
    Type: Grant
    Filed: July 12, 2016
    Date of Patent: October 30, 2018
    Assignee: INFINEON TECHNOLOGIES AMERICAS CORP.
    Inventors: Robert Fesler, Srivastava Aviral
  • Cross-Coupled, Narrow Pulse, High Voltage Level Shifting Circuit With Voltage Domain Common Mode Rejection
    Publication number: 20180019749
    Abstract: A system for high voltage level shifting includes a level shifting circuit having a high side circuit that receives a mixed signal having a common mode signal and a differential mode signal, and to attenuate the common mode signal in the mixed signal to generate an adjusted signal. The high side circuit generates a high output signal at a high output node in response to the adjusted signal. The system further includes a high side high voltage power transistor having a gate connected to the high output node of the high side circuit. The high side high voltage power transistor configured to provide a high portion of an output signal on a first output node in response to the high output signal.
    Type: Application
    Filed: July 12, 2016
    Publication date: January 18, 2018
    Inventors: Robert Fesler, Srivastava Aviral