Patents by Inventor Robert Fix

Robert Fix has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7040013
    Abstract: A method, system, and product for routing nets along a printed circuit board through an obstacle field and a circuit board having traces produced in accordance with the routed nets is disclosed. The nets are routed by identifying a general path for each of a pair of nets between adjacent rows of obstacles within an obstacle field, selectively lengthening at least one of the nets by shifting at least one portion of the net toward a position between adjacent pads in one of the rows, thereby increasing the length of the net, and selectively increasing the mean spacing between the pair of nets by shifting at least one portion of at least one net of the pair away from the other net of the pair toward a position between adjacent pads in one of the rows, thereby reducing cross-talk between the nets.
    Type: Grant
    Filed: March 17, 2003
    Date of Patent: May 9, 2006
    Assignee: Unisys Corporation
    Inventors: Daniel A. Jochym, Christian E. Shenberger, Robert Fix
  • Patent number: 6842344
    Abstract: A printed circuit board having a dielectric layer is disclosed. At least one signal trace is disposed adjacent a first surface of the dielectric layer in a first signal area. A reference plane is disposed adjacent a second surface of the dielectric layer in a first reference area positioned opposite the first signal area. The reference plane is configured to carry a reference potential for signals on the signal trace. At least one other signal trace is disposed adjacent the second surface of the dielectric layer in a second signal area and coupled to the signal trace in said first signal area. A second reference plane is disposed adjacent the first surface of the first dielectric layer in a second reference area positioned opposite the second signal area. The second reference plane is configured to carry the reference potential for signals on the other signal trace.
    Type: Grant
    Filed: March 17, 2003
    Date of Patent: January 11, 2005
    Assignee: Unisys Corporation
    Inventors: Robert Fix, Daniel A. Jochym, Christian E. Shenberger