Patents by Inventor Robert Forcier

Robert Forcier has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190081193
    Abstract: An ultraviolet light sensor and method of manufacturing thereof are disclosed. The ultraviolet light sensor includes Group-III Nitride layers adjacent to a silicon wafer with one of the layers at least partially exposed such that a surface thereof can receive UV light to be detected. The Group-III Nitride layers include a p-type layer and an n-type layer, with p/n junctions therebetween forming at least one diode. Conductive contacts are arranged to conduct electrical current through the sensor as a function of ultraviolet light received at the outer Group-III Nitride layer. The Group-III Nitride layers may be formed from, e.g., GaN, InGaN, AlGaN, or InAlN. The sensor may include a buffer layer between one of the Group-III Nitride layers and the silicon wafer. By utilizing silicon as the substrate on which the UV sensor diode is formed, a UV sensor can be produced that is small, efficient, cost-effective, and compatible with other semiconductor circuits and processes.
    Type: Application
    Filed: November 8, 2018
    Publication date: March 14, 2019
    Applicant: ROSESTREET LABS, LLC
    Inventors: ROBERT FORCIER, WLADYSLAW WALUKIEWICZ
  • Patent number: 10128389
    Abstract: An ultraviolet light sensor and method of manufacturing thereof are disclosed. The ultraviolet light sensor includes Group-III Nitride layers adjacent to a silicon wafer with one of the layers at least partially exposed such that a surface thereof can receive UV light to be detected. The Group-III Nitride layers include a p-type layer and an n-type layer, with p/n junctions therebetween forming at least one diode. Conductive contacts are arranged to conduct electrical current through the sensor as a function of ultraviolet light received at the outer Group-III Nitride layer. The Group-III Nitride layers may be formed from, e.g., GaN, InGaN, AlGaN, or InAlN. The sensor may include a buffer layer between one of the Group-III Nitride layers and the silicon wafer. By utilizing silicon as the substrate on which the UV sensor diode is formed, a UV sensor can be produced that is small, efficient, cost-effective, and compatible with other semiconductor circuits and processes.
    Type: Grant
    Filed: September 28, 2017
    Date of Patent: November 13, 2018
    Assignee: ROSESTREET LABS, LLC
    Inventors: Robert Forcier, Wladyslaw Walukiewicz
  • Publication number: 20180019351
    Abstract: An ultraviolet light sensor and method of manufacturing thereof are disclosed. The ultraviolet light sensor includes Group-III Nitride layers adjacent to a silicon wafer with one of the layers at least partially exposed such that a surface thereof can receive UV light to be detected. The Group-III Nitride layers include a p-type layer and an n-type layer, with p/n junctions therebetween forming at least one diode. Conductive contacts are arranged to conduct electrical current through the sensor as a function of ultraviolet light received at the outer Group-III Nitride layer. The Group-III Nitride layers may be formed from, e.g., GaN, InGaN, AlGaN, or InAlN. The sensor may include a buffer layer between one of the Group-III Nitride layers and the silicon wafer. By utilizing silicon as the substrate on which the UV sensor diode is formed, a UV sensor can be produced that is small, efficient, cost-effective, and compatible with other semiconductor circuits and processes.
    Type: Application
    Filed: September 28, 2017
    Publication date: January 18, 2018
    Applicant: ROSESTREET LABS, LLC
    Inventors: ROBERT FORCIER, WLADYSLAW WALUKIEWICZ
  • Patent number: 9780239
    Abstract: An ultraviolet light sensor and method of manufacturing thereof are disclosed. The ultraviolet light sensor includes Group-III Nitride layers adjacent to a silicon wafer with one of the layers at least partially exposed such that a surface thereof can receive UV light to be detected. The Group-III Nitride layers include a p-type layer and an n-type layer, with p/n junctions therebetween forming at least one diode. Conductive contacts are arranged to conduct electrical current through the sensor as a function of ultraviolet light received at the outer Group-III Nitride layer. The Group-III Nitride layers may be formed from, e.g., GaN, InGaN, AlGaN, or InAlN. The sensor may include a buffer layer between one of the Group-III Nitride layers and the silicon wafer. By utilizing silicon as the substrate on which the UV sensor diode is formed, a UV sensor can be produced that is small, efficient, cost-effective, and compatible with other semiconductor circuits and processes.
    Type: Grant
    Filed: October 24, 2012
    Date of Patent: October 3, 2017
    Assignee: ROSESTREET LABS, LLC
    Inventors: Robert Forcier, Wladyslaw Walukiewicz
  • Patent number: 9275981
    Abstract: A semiconductor integrated circuit has one or more integral nitride-type sensors. In one embodiment, an integral nitride-type sensor and a coplanar supplemental circuit are formed from a common silicon substrate base. In another embodiment, an integral nitride-type sensor and a supplemental circuit are integrated in a vertical orientation.
    Type: Grant
    Filed: November 24, 2014
    Date of Patent: March 1, 2016
    Assignee: RoseStreet Labs, LLC
    Inventor: Robert Forcier
  • Patent number: 9018750
    Abstract: Disclosed is a package that includes a wafer substrate and a metal stack seed layer. The metal stack seed layer includes a titanium thin film outer layer. A resist layer is provided in contact with the titanium thin film outer layer of the metal stack seed layer, the resist layer forming circuitry. A method for manufacturing a package is further disclosed. A metal stack seed layer having a titanium thin film outer layer is formed. A resist layer is formed so as to be in contact with the titanium thin film outer layer of the metal stack seed layer, and circuitry is formed from the resist layer.
    Type: Grant
    Filed: August 10, 2012
    Date of Patent: April 28, 2015
    Assignee: Flipchip International, LLC
    Inventors: Robert Forcier, Douglas Scott
  • Publication number: 20150102450
    Abstract: A semiconductor integrated circuit has one or more integral nitride-type sensors. In one embodiment, an integral nitride-type sensor and a coplanar supplemental circuit are formed from a common silicon substrate base. In another embodiment, an integral nitride-type sensor and a supplemental circuit are integrated in a vertical orientation.
    Type: Application
    Filed: November 24, 2014
    Publication date: April 16, 2015
    Applicant: RoseStreet Labs, LLC
    Inventor: Robert Forcier
  • Patent number: 8937298
    Abstract: A semiconductor integrated circuit has one or more integral nitride-type sensors. In one embodiment, an integral nitride-type sensor and a coplanar supplemental circuit are formed from a common silicon substrate base. In another embodiment, an integral nitride-type sensor and a supplemental circuit are integrated in a vertical orientation.
    Type: Grant
    Filed: March 13, 2013
    Date of Patent: January 20, 2015
    Assignee: RoseStreet Labs, LLC
    Inventor: Robert Forcier
  • Publication number: 20140264358
    Abstract: A semiconductor integrated circuit has one or more integral nitride-type sensors. In one embodiment, an integral nitride-type sensor and a coplanar supplemental circuit are formed from a common silicon substrate base. In another embodiment, an integral nitride-type sensor and a supplemental circuit are integrated in a vertical orientation.
    Type: Application
    Filed: March 13, 2013
    Publication date: September 18, 2014
    Inventor: Robert Forcier
  • Publication number: 20140053895
    Abstract: A method and structure for a solar cell forms and utilizes a low resistivity and high transmission semiconductor in a top and/or bottom layer (e.g., a top or bottom contact). Some embodiments relate to solar cells having a top or bottom transparent contact layer comprising doped cadmium oxide (CdO) or alloys of CdO.
    Type: Application
    Filed: March 11, 2013
    Publication date: February 27, 2014
    Applicant: RoseStreet Labs, LLC
    Inventors: LOTHAR A. REICHERTZ, Robert Forcier
  • Publication number: 20130037956
    Abstract: Disclosed is a package that includes a wafer substrate and a metal stack seed layer. The metal stack seed layer includes a titanium thin film outer layer. A resist layer is provided in contact with the titanium thin film outer layer of the metal stack seed layer, the resist layer forming circuitry. A method for manufacturing a package is further disclosed. A metal stack seed layer having a titanium thin film outer layer is formed. A resist layer is formed so as to be in contact with the titanium thin film outer layer of the metal stack seed layer, and circuitry is formed from the resist layer.
    Type: Application
    Filed: August 10, 2012
    Publication date: February 14, 2013
    Applicant: FlipChip International, LLC
    Inventors: Robert Forcier, Douglas Scott
  • Patent number: 7498946
    Abstract: A transceiver preferably embedded within a wearable security watch, PDA, or other device which achieves a variety of wireless ultrasonic and/or radio-frequency based functions, including digital identification and proximity and sensation monitoring of assets, individuals, pets, and the like. The portable or wearable device realizes these functions by periodically polling and receiving information tags within the transmitting distance of the device. The invention can help reduce the likelihood of the theft, loss, or misplacement by detecting that a tag associated with or attached to an entity has left an individual's proximity and sounding an alarm. The device can also assist individuals with sensory impairments, including persons who are deaf, diabetic, and the like, by detecting a tagged entity as it enters the space around an individual, or by detecting environmental stimuli, such as excessive heat in an individual's proximity or vital sign changes, and sounding an alarm.
    Type: Grant
    Filed: March 2, 2006
    Date of Patent: March 3, 2009
    Assignee: BeezerBug Incorporated
    Inventors: Robert Forcier, Paul Brantner
  • Patent number: 7371970
    Abstract: A rigid-flex circuit board system that can be manufactured using less expensive and more reliable rigid circuit board methods and equipment, and can maintain rigidity and dimensional stability until the time when it is first desired to flex.
    Type: Grant
    Filed: December 8, 2003
    Date of Patent: May 13, 2008
    Inventors: Jeffrey D. Flammer, Robert Forcier
  • Publication number: 20060181421
    Abstract: A transceiver preferably embedded within a wearable security watch, PDA, or other device which achieves a variety of wireless ultrasonic and/or radio-frequency based functions, including digital identification and proximity and sensation monitoring of assets, individuals, pets, and the like. The portable or wearable device realizes these functions by periodically polling and receiving information tags within the transmitting distance of the device. The invention can help reduce the likelihood of the theft, loss, or misplacement by detecting that a tag associated with or attached to an entity has left an individual's proximity and sounding an alarm. The device can also assist individuals with sensory impairments, including persons who are deaf, diabetic, and the like, by detecting a tagged entity as it enters the space around an individual, or by detecting environmental stimuli, such as excessive heat in an individual's proximity or vital sign changes, and sounding an alarm.
    Type: Application
    Filed: March 2, 2006
    Publication date: August 17, 2006
    Applicant: BeezerBug Incorporated
    Inventors: Robert Forcier, Paul Brantner
  • Patent number: 7061381
    Abstract: A transceiver preferably embedded within a wearable security watch, PDA, or other device which achieves a variety of wireless ultrasonic and/or radio-frequency based functions, including digital identification and proximity and sensation monitoring of assets, individuals, pets, and the like. The portable or wearable device realizes these functions by periodically polling and receiving information tags within the transmitting distance of the device. The invention can help reduce the likelihood of the theft, loss, or misplacement by detecting that a tag associated with or attached to an entity has left an individual's proximity and sounding an alarm. The device can also assist individuals with sensory impairments, including persons who are deaf, diabetic, and the like, by detecting a tagged entity as it enters the space around an individual, or by detecting environmental stimuli, such as excessive heat in an individual's proximity or vital sign changes, and sounding an alarm.
    Type: Grant
    Filed: September 9, 2002
    Date of Patent: June 13, 2006
    Assignee: BeezerBug Incorporated
    Inventors: Robert Forcier, Paul Brantner
  • Patent number: 7011988
    Abstract: A build-up structure for chip to chip interconnects and System-In-Package utilizing multi-angle vias for electrical and optical routing or bussing of electronic information and controlled CTE dielectrics including mesocomposites to achieve optimum electrical and optical performance of monolithic structures. Die, multiple die, Microelectromechanical Machines (MEMs) and/or other active or passive components such as transducers or capacitors can be accurately positioned on a substrate such as a copper heatsink and multi-angle stud bumps can be placed on the active sites of the components. A first dielectric layer is preferably placed on the components, thereby embedding the components in the structure. Through various processes of photolithography, laser machining, soft lithography or anisotropic conductive film bonding, escape routing and circuitry is formed on the first metal layer.
    Type: Grant
    Filed: June 7, 2005
    Date of Patent: March 14, 2006
    Assignee: FlipChip International, LLC
    Inventor: Robert Forcier
  • Publication number: 20050269687
    Abstract: A build-up structure for chip to chip interconnects and System-In-Package utilizing multi-angle vias for electrical and optical routing or bussing of electronic information and controlled CTE dielectrics including mesocomposites to achieve optimum electrical and optical performance of monolithic structures. Die, multiple die, Microelectromechanical Machines (MEMs) and/or other active or passive components such as transducers or capacitors can be accurately positioned on a substrate such as a copper heatsink and multi-angle stud bumps can be placed on the active sites of the components. A first dielectric layer is preferably placed on the components, thereby embedding the components in the structure. Through various processes of photolithography, laser machining, soft lithography or anisotropic conductive film bonding, escape routing and circuitry is formed on the first metal layer.
    Type: Application
    Filed: June 7, 2005
    Publication date: December 8, 2005
    Applicant: Robert Forcier
    Inventor: Robert Forcier
  • Patent number: 6919508
    Abstract: A build-up structure for chip to chip interconnects and System-In-Package utilizing multi-angle vias for electrical and optical routing or bussing of electronic information and controlled CTE dielectrics including mesocomposites to achieve optimum electrical and optical performance of monolithic structures. Die, multiple die, Microelectromechanical Machines (MEMs) and/or other active or passive components such as transducers or capacitors can be accurately positioned on a substrate such as a copper heatsink and multi-angle stud bumps can be placed on the active sites of the components. A first dielectric layer is preferably placed on the components, thereby embedding the components in the structure. Through various processes of photolithography, laser machining, soft lithography or anisotropic conductive film bonding, escape routing and circuitry is formed on the first metal layer.
    Type: Grant
    Filed: November 10, 2003
    Date of Patent: July 19, 2005
    Assignee: FlipChip International, LLC
    Inventor: Robert Forcier
  • Publication number: 20050087356
    Abstract: A build-up structure for chip to chip interconnects and System-In-Package utilizing multi-angle vias for electrical and optical routing or bussing of electronic information and controlled CTE dielectrics including mesocomposites to achieve optimum electrical and optical performance of monolithic structures. Die, multiple die, Microelectromechanical Machines (MEMs) and/or other active or passive components such as transducers or capacitors can be accurately positioned on a substrate such as a copper heatsink and multi-angle stud bumps can be placed on the active sites of the components. A first dielectric layer is preferably placed on the components, thereby embedding the components in the structure. Through various processes of photolithography, laser machining, soft lithography or anisotropic conductive film bonding, escape routing and circuitry is formed on the first metal layer.
    Type: Application
    Filed: November 10, 2003
    Publication date: April 28, 2005
    Applicant: Robert Forcier
    Inventor: Robert Forcier
  • Publication number: 20040212504
    Abstract: A transceiver preferably embedded within a wearable security watch, PDA, or other device which achieves a variety of wireless ultrasonic and/or radio-frequency based functions, including digital identification and proximity and sensation monitoring of assets, individuals, pets, and the like. The portable or wearable device realizes these functions by periodically polling and receiving information tags within the transmitting distance of the device. The invention can help reduce the likelihood of the theft, loss, or misplacement by detecting that a tag associated with or attached to an entity has left an individual's proximity and sounding an alarm. The device can also assist individuals with sensory impairments, including persons who are deaf, diabetic, and the like, by detecting a tagged entity as it enters the space around an individual, or by detecting environmental stimuli, such as excessive heat in an individual's proximity or vital sign changes, and sounding an alarm.
    Type: Application
    Filed: May 19, 2004
    Publication date: October 28, 2004
    Applicant: BeezerBug Incorporated
    Inventors: Robert Forcier, Paul Brantner