Abstract: A method for decoding data that has been encoded in a monochrome medium utilizing the capability of the medium for grayscale resolution. A document is processed to provide an image in electronic format, in which each pixel has an assigned data value with a given bit depth. A mapping operation is performed for generating a monochrome data word (120), preferably having a reduced bit depth. The monochrome data word (120) can be used to encode multiple data fields (114, 116, 118). A printer (92) then produces a preserved document record (90) in which the appropriate monochrome data word (120) determines the grayscale value for each pixel. To decode the stored data, a scanner (86) is employed to obtain the grayscale value from the preserved document record (90). For each pixel, the grayscale value is then decomposed into multiple data fields (114, 116, 118), which can then be decoded to provide the information that was originally encoded.

Abstract: A method for encoding data in a monochrome media utilizing the capability of the media for grayscale resolution. A document is processed to provide an image in electronic format, in which each pixel has an assigned data value with a given bit depth. A mapping operation is performed for generating a monochrome data word (120), preferably having a reduced bit depth. The monochrome data word (120) can be used to encode multiple data fields (114, 116, 118). A printer (92) then produces a preserved document record (90) in which the appropriate monochrome data word (120) determines the grayscale value for each pixel.

Abstract: A method for decoding data that has been encoded in a monochrome medium utilizing the capability of the medium for grayscale resolution. A document is processed to provide an image in electronic format, in which each pixel has an assigned data value with a given bit depth. A mapping operation is performed for generating a monochrome data word (120), preferably having a reduced bit depth. The monochrome data word (120) can be used to encode multiple data fields (114, 116, 118). A printer (92) then produces a preserved document record (90) in which the appropriate monochrome data word (120) determines the grayscale value for each pixel. To decode the stored data, a scanner (86) is employed to obtain the grayscale value from the preserved document record (90). For each pixel, the grayscale value is then decomposed into multiple data fields (114, 116, 118), which can then be decoded to provide the information that was originally encoded.

Abstract: A method for encoding data in a monochrome media utilizing the capability of the media for grayscale resolution. A document is processed to provide an image in electronic format, in which each pixel has an assigned data value with a given bit depth. A mapping operation is performed for generating a monochrome data word (120), preferably having a reduced bit depth. The monochrome data word (120) can be used to encode multiple data fields (114, 116, 118). A printer (92) then produces a preserved document record (90) in which the appropriate monochrome data word (120) determines the grayscale value for each pixel.

Abstract: A system and method for entering a circuit design into a computer using a schematic capture package. The schematic capture package is modified to include a library of state flow components represented by symbols which can be connected to produce a desired representation of the circuit design. The system allows a circuit design to be displayed on a video terminal using both state flow diagram and the schematic diagram symbols, with terminals of the state flow symbols connecting to terminals of the schematic symbols. The state flow diagram using state flow symbols is combined with a schematic diagram including schematic symbols to generate a netlist representing the combined circuit.

Abstract: A method by which a two-dimensional array of logic elements may be interconnected such that they may be modeled as a three-dimensional array, while minimizing routing crossings. The result is an arrangement that is highly efficient for implementation in a silicon die. The preferred model may be extended to a three-dimensional torus where opposing faces of the array are considered to be adjacent. Routing flexibility is increased by increasing local interconnect while minimizing interconnect crossover.

Abstract: A system and method for entering a circuit design into a computer using a schematic capture package. The schematic capture package is modified to include a library of state flow components represented by symbols which can be connected to produce a desired representation of the circuit design. The system allows a circuit design to be displayed on a video terminal using both state flow diagram and the schematic diagram symbols, with terminals of the state flow symbols connecting to terminals of the schematic symbols. The state flow diagram using state flow symbols is combined with a schematic diagram including schematic symbols to generate a netlist representing the combined circuit.

Abstract: A programmable logic device (PLD) for implementing pipelined designs is described. A pipeline array of registers and function generators, comprises registers and function generators arranged along a line in a first direction, the first direction being a direction of propagation of data signals, and registers and function generators arranged along a line in a second direction, the second direction being a direction of propagation of carry signals and control signals. Each of said function generators is operatively connected by routing resources to at least two of the registers within the pipeline array. A synchronization ring of the PLD comprises shift registers, each of the shift registers being programmable such that its bit length can be adjusted from one bit to a predefined maximum number of bits. The synchronization ring surrounds and is operatively connected by routing resources to the pipeline array.

Abstract: A system and method for entering a circuit design into a computer using a schematic capture package. The schematic capture package is modified to include a library of state flow components represented by symbols which can be connected to produce a desired representation of the circuit design. The system allows a circuit design to be displayed on a video terminal using both state flow diagram and the schematic diagram symbols, with terminals of the state flow symbols connecting to terminals of the schematic symbols. The state flow diagram using state flow symbols is combined with a schematic diagram including schematic symbols to generate a netlist representing the combined circuit.