Abstract: A DC-to-DC converter has a pulse width modulator PWM) and a hysteretic (ripple) modulator. For low current loads, the hysteretic modulator is selected; for high current loads, the PWM is selected. A mode selection switch senses the polarity of the switched output voltage at the end of each switching cycle. If the polarity changes from one cycle to the next, the mode may be instantly changed to the other mode. Counters are used to record the polarity at the end of each cycle and switching from one mode to another can be delayed by the counters to prevent changing modes based on spurious output voltage fluctuations.

Abstract: An electronic system 100 controls power to its central processing unit 22 with digital voltage identification (VID) codes and analog set signals. The VID codes are converted into an analog VID signal by digital to analog converter 42. An analog set voltage 62 generated by a sense network 60 sets the voltage level when the CPU operates at any voltage less than its maximum. Comparator 50 and switch 52 select either the analog VID voltage or the analog set voltage.

Abstract: A DC-to-DC converter has a pulse width modulator PWM) and a hysteretic (ripple) modulator. For low current loads, the hysteretic modulator is selected; for high current loads, the PWM is selected. A mode selection switch senses the polarity of the switched output voltage at the end of each switching cycle. If the polarity changes from one cycle to the next, the mode may be instantly changed to the other mode. Counters are used to record the polarity at the end of each cycle and switching from one mode to another can be delayed by the counters to prevent changing modes based on spurious output voltage fluctuations.

Abstract: A DC-to-DC converter has a pulse width modulator PWM) and a hysteretic (ripple) modulator. For low current loads, the hysteretic modulator is selected; for high current loads, the PWM is selected. A mode selection switch senses the polarity of the switched output voltage at the end of each switching cycle. If the polarity changes from one cycle to the next, the mode may be instantly changed to the other mode. Counters are used to record the polarity at the end of each cycle and switching from one mode to another can be delayed by the counters to prevent changing modes based on spurious output voltage fluctuations.

Abstract: A DC-to-DC converter has a pulse width modulator PWM) and a hysteretic (ripple) modulator. For low current loads, the hysteretic modulator is selected; for high current loads, the PWM is selected. A mode selection switch senses the polarity of the switched output voltage at the end of each switching cycle. If the polarity changes from one cycle to the next, the mode may be instantly changed to the other mode. Counters are used to record the polarity at the end of each cycle and switching from one mode to another can be delayed by the counters to prevent changing modes based on spurious output voltage fluctuations.

Abstract: A DC-to-DC converter includes a pulse width modulation circuit for modulating a switch to produce current pulses having at least a minimum pulse width to thereby control an output voltage to the load. The converter also includes a current limit determining circuit for determining when a desired peak current is no longer sufficient to maintain a desired output voltage thereby defining a current limit condition. In addition, the pulse width modulating circuit, when operating at the minimum pulse width, thereby defines a minimum pulse width condition. Accordingly, the converter preferably further includes an over-current determining circuit for determining an over-current condition responsive to the minimum pulse width condition being reached during a current limit condition. The converter may turn off the switch responsive to an over-current condition. A blanking signal may be used to clamp a comparator and established a minimum pulse width.

Abstract: A DC-to-DC converter includes a comparator for controlling a high-side switch and has one input connected to a switch signal and another input connected to a peak current reference signal. A comparator bias boost circuit increases a bias to the comparator to provide accurate comparisons even when the switch signal and the peak current reference signal are both relatively close to a voltage of the source. The additional bias may be provided by a voltage which is typically available for a DC-to-DC converter. More particularly, the high-side switch has a terminal defining a phase node, and the additional bias voltage may be provided by a capacitor referenced to the phase node to provide the bias higher than a voltage of the source and responsive to switching at the phase node. The converter preferably further includes one or more clamps for clamping the output of the comparator during a relatively rapid change in the bias. A clock may be used for turning on the high-side switch.

Abstract: The junction temperature rise of a power MOSFET serially connected to a lamp whose resistance nonlinearly increases during turn-on is moderated by the use of control circuitry which initially sets up a relatively low essentially constant current flow through the lamp and transistor and then automatically after the lamp resistance reaches a preselected level, the lamp is allowed to draw significantly more current. The size and therefore cost of the power MOSFET is reduced significantly because the magnitude of the current spike generated by turning on the lamp is significantly reduced the use of the novel control circuitry.

Abstract: A process for fabricating a power IC structure which includes the following masking steps:1. CMOS P well mask2. JFET (short-channel implant) mask3. Field oxide growth mask4. Deep P+ mask5. Polysilicon mask6. DMOS P well mask7. n-/n+ mask8. Contact window mask9. Metalization mask10. Overglass mask.

Abstract: A disclosed MOSFET cell has a source region formed at the top surface of a semiconductor substrate. The top surface source region is electrically coupled to a conductive region at a bottom portion of the substrate by means of a vertical conduit which projects through the substrate from the top surface to the conductive region. A current exchanger is provided extending over the top surface of the substrate and coupling a top surface portion of the vertical conduit to the source region. The current exchanger makes ohmic contact with the source region and with the conduit region and shorts the two regions together such that majority carrier current of the conduit region will be "converted" into majority carrier current of the source region and electrical continuity between the source region and the conductive region of the substrate is established.

Abstract: A pass transistor is coupled serially with an integrated circuit across a DC energy source. The DC source includes a battery coupled in parallel with a charging transformer output and a diode, the negative side being connected to ground. A resistor is coupled across the pass transistor collector and base to assure conduction by the pass transistor when the DC source is operative. A string of zener diodes is connected between the pass transistor base and ground to provide voltage limiting by clamping the transistor base during an overvoltage condition arising, for example, when the battery has a defective cell or an open connection to the remainder of the circuit. Such an arrangement allows reliable operation with monolithic transistors having about 27 volts collector to emitter breakdown voltage rating.