Patents by Inventor Robert G. Wodnicki

Robert G. Wodnicki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240019404
    Abstract: A system and method for imaging biological material is disclosed. The imaging system may comprise: a multi-well assay plate having a plurality of wells, each well of the plurality of wells defining a cavity that is configured to hold a biological material; an imaging module having a plurality of transducers; and a processor coupled to the imaging module. The processor may be configured to: activate the plurality of transducers to emit energy within the plurality of wells to stimulate the biological material, and generate an image of or analyze the biological material within each well. The method may comprise: adding a thin layer of acoustic coupling material; inserting the microwell plate into a support frame of an enclosure; mechanically translating the support frame; interrogating each of the wells of the microwell plate with ultrasound; and outputting results of the interrogation to an output device.
    Type: Application
    Filed: October 15, 2021
    Publication date: January 18, 2024
    Applicant: UNIVERSITY OF SOUTHERN CALIFORNIA
    Inventors: Robert G. Wodnicki, Haochen Kang
  • Publication number: 20220079559
    Abstract: A modular array includes modular array includes one or more array modules. Each array module includes one or more transducer arrays, where each of the one or more transducer arrays includes a plurality of piezoelectric elements; a conducting interposer arranged and configured to provide acoustic absorbing backing for the one or more transducer arrays; and one or more Application Specific Integrated Circuits (ASICs). The conducting interposer and the one or more ASICs are in electrical contact with each other at a first direct electrical interface. Additionally, the conducting interposer and the one or more transducer arrays are in electrical contact with each other at a second direct electrical interface.
    Type: Application
    Filed: August 31, 2021
    Publication date: March 17, 2022
    Applicants: University of Southern California, The Regents of the University of California
    Inventors: Robert G. Wodnicki, Qifa Zhou, Thomas Matthew Cummins, Douglas N. Stephens, Katherine W. Ferrara
  • Publication number: 20220071594
    Abstract: Two-dimensional transducers arrays for ultrasound imaging is disclosed. The two-dimensional arrays are suitable for formation of two-dimensional (2D) and/or three-dimensional (3D) ultrasound images. The two-dimensional arrays are suitable for real-time 2D and/or 3D ultrasound imaging. The bowtie transducer arrays and the rectangular transducer arrays are suitable for real-time 2D and/or 3D ultrasound imaging.
    Type: Application
    Filed: September 3, 2021
    Publication date: March 10, 2022
    Inventors: Jesse Tong-Pin Yen, Robert G. Wodnicki
  • Patent number: 11134918
    Abstract: A modular array includes modular array includes one or more array modules. Each array module includes one or more transducer arrays, where each of the one or more transducer arrays includes a plurality of piezoelectric elements; a conducting interposer arranged and configured to provide acoustic absorbing backing for the one or more transducer arrays; and one or more Application Specific Integrated Circuits (ASICs). The conducting interposer and the one or more ASICs are in electrical contact with each other at a first direct electrical interface. Additionally, the conducting interposer and the one or more transducer arrays are in electrical contact with each other at a second direct electrical interface.
    Type: Grant
    Filed: February 18, 2017
    Date of Patent: October 5, 2021
    Assignees: University of Southern California, The Regents of the University of California
    Inventors: Robert G. Wodnicki, Qifa Zhou, Thomas Matthew Cummins, Douglas N. Stephens, Katherine W. Ferrara
  • Publication number: 20200046320
    Abstract: A modular array includes modular array includes one or more array modules. Each array module includes one or more transducer arrays, where each of the one or more transducer arrays includes a plurality of piezoelectric elements; a conducting interposer arranged and configured to provide acoustic absorbing backing for the one or more transducer arrays; and one or more Application Specific Integrated Circuits (ASICs). The conducting interposer and the one or more ASICs are in electrical contact with each other at a first direct electrical interface. Additionally, the conducting interposer and the one or more transducer arrays are in electrical contact with each other at a second direct electrical interface.
    Type: Application
    Filed: February 18, 2017
    Publication date: February 13, 2020
    Applicants: University of Southern California, Regents of the University of California, Daavis
    Inventors: Robert G. WODNICKI, Qifa ZHOU, Thomas Matthew CUMMINS, Douglas N. STEPHENS, Katherine W. FERRARA
  • Patent number: 7314445
    Abstract: A low-voltage transmit/receive switch that acts to protect sensitive low-voltage electronics from high-voltage pulse signals used to drive an ultrasonic transducer. The low-voltage transmit/receive switch comprises a series resistor and a parallel MOSFET pair. The parallel MOSFETs are low-voltage devices. The low-voltage transmit/receive switch is placed between the output of a high-voltage pulser and the input of a receive pre-amplifier. If dual high- and low-voltage pulsers are used, then the low-voltage pulser is connected so that it is also protected from the high-voltage pulse signals by the low-voltage transmit/receive switch. In an alternative embodiment, the low-voltage pulser and the receive pre-amplifier are protected from the high-voltage pulse signals by a high-voltage transmit/receive switch.
    Type: Grant
    Filed: December 30, 2003
    Date of Patent: January 1, 2008
    Assignee: General Electric Company
    Inventors: Robert G. Wodnicki, Rayette A. Fisher
  • Patent number: 7052464
    Abstract: An integrated circuit is fabricated by micromachining a hexagonal array of cMUT elements on top of a substrate comprising a hexagonal array of CMOS cells. Each cMUT element overlies a respective CMOS cell in one-to-one correspondence. During layout of the mask for micromachining the cMUT layer, either the hexagonal pattern or the alignment key is rotated until an axis of symmetry of the hexagonal pattern is aligned with an axis of the alignment key. Later, when the mask is superimposed on the CMOS substrate, the alignment key on the mask is aligned with an alignment key on the substrate. This ensures that the cMUT elements formed by optical lithography will be matched to the CMOS cells.
    Type: Grant
    Filed: January 1, 2004
    Date of Patent: May 30, 2006
    Assignee: General Electric Company
    Inventor: Robert G. Wodnicki
  • Patent number: 6865140
    Abstract: An ultrasound transducer array includes a multiplicity of subelements interconnected by a multiplicity of microelectronic switches, each subelement comprising a respective multiplicity of micromachined ultrasound transducer (MUT) cells. The MUT cells within a particular subelement are hard-wired together. The switches are used to configure the subelements to form multiple concentric annular elements. This design dramatically reduces complexity while enabling focusing in the elevation direction during ultrasonic image data acquisition.
    Type: Grant
    Filed: March 6, 2003
    Date of Patent: March 8, 2005
    Assignee: General Electric Company
    Inventors: Kai Thomenius, Rayette A. Fisher, David M. Mills, Robert G. Wodnicki, Christopher Robert Hazard, Lowell Scott Smith
  • Patent number: 6856175
    Abstract: In an ultrasound transmit ASIC, the rise and fall times of the output pulse can be controlled by varying the gate-source voltage used to drive the output-stage transistors. Control of the rise/fall times can be effected either by trimming on-chip during fabrication or by changing the gate-source voltage that drives the output-stage transistors, either on-chip or off-chip. In all cases it will be necessary to first test the manufactured device to determine how much calibration voltage needs to be applied.
    Type: Grant
    Filed: December 12, 2002
    Date of Patent: February 15, 2005
    Assignee: General Electric Company
    Inventor: Robert G. Wodnicki
  • Publication number: 20040174773
    Abstract: An ultrasound transducer array includes a multiplicity of subelements interconnected by a multiplicity of microelectronic switches, each subelement comprising a respective multiplicity of micromachined ultrasound transducer (MUT) cells. The MUT cells within a particular subelement are hard-wired together. The switches are used to configure the subelements to form multiple concentric annular elements. This design dramatically reduces complexity while enabling focusing in the elevation direction during ultrasonic image data acquisition.
    Type: Application
    Filed: March 6, 2003
    Publication date: September 9, 2004
    Inventors: Kai Thomenius, Rayette A. Fisher, David M. Mills, Robert G. Wodnicki, Christopher Robert Hazard, Lowell Scott Smith
  • Patent number: 6759888
    Abstract: A high-voltage switching circuit comprising: a switch having ON and OFF states and having a parasitic gate capacitance and a control circuit for turning the switch on and off. The switch comprises a pair of DMOS FETs having a shared gate terminal, the sources of the DMOS FETs being connected to each other and the drains of the DMOS FETs being connected to the input and output terminals of the switch respectively, and biased at a bias voltage level. The control circuit comprises: a programming transistor having its drain connected to the shared gate terminal of the switch, its source connected to receive a programming voltage, and its gate connected to receive a programming transistor gate voltage; first circuitry for causing a first transition from a first level to a second (lower) level of the programming voltage; and second circuitry for causing a second transition from a first level to a second level of the programming transistor gate voltage.
    Type: Grant
    Filed: September 8, 2003
    Date of Patent: July 6, 2004
    Assignee: General Electric Company
    Inventor: Robert G. Wodnicki
  • Publication number: 20040113669
    Abstract: In an ultrasound transmit ASIC, the rise and fall times of the output pulse can be controlled by varying the gate-source voltage used to drive the output-stage transistors. Control of the rise/fall times can be effected either by trimming on-chip during fabrication or by changing the gate-source voltage that drives the output-stage transistors, either on-chip or off-chip.
    Type: Application
    Filed: December 12, 2002
    Publication date: June 17, 2004
    Inventor: Robert G. Wodnicki