Abstract: In a circuit of the type in which a command signal actuates a semiconductor switch which, in turn, actuates a load device and in which a clock signal is available, a protection circuit for protecting the semiconductor switch located in series with the load from excessive current in the event the load device is short circuited. The protection circuit includes a sensing circuit for sensing the voltage level at a point intermediate the semiconductor switch and the load. The protection circuit interfaces between the command signal and the clock signal in such a manner that the semiconductor switch is repeatedly momentarily energized if the load is shorted and a command signal is present.