Patents by Inventor Robert Gernhardt

Robert Gernhardt has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method for manufacturing a semiconductor component and a semiconductor component
    Patent number: 10658187
    Abstract: A method for manufacturing a semiconductor component including: providing a flat carrier with an upper side and a lower side, the carrier including a continuous opening that runs between the upper side and the lower side; providing a semiconductor arrangement that includes a semiconductor chip that includes electrically and/or optically active regions on a lower side; arranging the semiconductor arrangement in the opening such that a lower side of the semiconductor arrangement and the lower side of the carrier run in a common plane; casting the semiconductor arrangement with a potting compound, such that the semiconductor arrangement is materially connected to the carrier; and thinning out the semiconductor system by way of grinding from above, such that an upper side of the carrier and an upper side of the semiconductor arrangement run in a common plane.
    Type: Grant
    Filed: March 1, 2017
    Date of Patent: May 19, 2020
    Assignee: FRAUNHOFER-GESELLSCHAFT ZUR FOERDERUNG DER ANGEWANDTEN FORSCHUNG E.V.
    Inventors: Hans-Hermann Oppermann, Kai Zoschke, Charles-Alix Manier, Martin Wilke, Tolga Tekin, Robert Gernhardt
  • METHOD FOR MANUFACTURING A SEMICONDUCTOR COMPONENT AND A SEMICONDUCTOR COMPONENT
    Publication number: 20190088490
    Abstract: A method for manufacturing a semiconductor component including: providing a flat carrier with an upper side and a lower side, the carrier including a continuous opening that runs between the upper side and the lower side; providing a semiconductor arrangement that includes a semiconductor chip that includes electrically and/or optically active regions on a lower side; arranging the semiconductor arrangement in the opening such that a lower side of the semiconductor arrangement and the lower side of the carrier run in a common plane; casting the semiconductor arrangement with a potting compound, such that the semiconductor arrangement is materially connected to the carrier; and thinning out the semiconductor system by way of grinding from above, such that an upper side of the carrier and an upper side of the semiconductor arrangement run in a common plane.
    Type: Application
    Filed: March 1, 2017
    Publication date: March 21, 2019
    Inventors: Hans-Hermann Oppermann, Kai Zoschke, Charles-Alix Manier, Martin Wilke, Tolga Tekin, Robert Gernhardt