Patents by Inventor Robert Glidden

Robert Glidden has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • On wafer testing of RFID tag circuit with pseudo antenna signal
    Publication number: 20060125508
    Abstract: An RFID tag circuit is described having a pair of signal paths that flow to an input of a demodulator of the RFID tag circuit. A first of the signal paths couple the demodulator to an antenna port of the RFID tag circuit. A second of the signal paths couple the demodulator to a location where a pseudo antenna signal first appears on the RFID tag circuit while the RFID tag circuit is being tested on-wafer.
    Type: Application
    Filed: January 4, 2006
    Publication date: June 15, 2006
    Inventors: Robert Glidden, William Colleran
  • RFID tag design with circuitry for wafer level testing
    Publication number: 20060125505
    Abstract: Technologies suitable for on-wafer testing in the ubiquitous computing era are disclosed. Among the inventive features disclosed are: 1) clustering of wafer test probe landing area sites for parallel test sequencing; 2) on wafer test wiring that runs along the wafer's scribe regions; 3) on-wafer test wiring that can be scribed and yet thwart the spread of contamination into the product die; 4) an RFID tag design that allows for on-wafer testing without imposing substantial semiconductor surface area penalty; 5) an RFID tag design that includes built-in self test (BIST) circuitry for the RFID tag's non-volatile memory.
    Type: Application
    Filed: December 15, 2004
    Publication date: June 15, 2006
    Inventors: Robert Glidden, Dennis Hara, Ronald Oliver, Jay Kuhn, John Hyde
  • Wafer level testing for RFID tags
    Publication number: 20060125507
    Abstract: Technologies suitable for on-wafer testing in the ubiquitous computing era are disclosed. Among the inventive features disclosed are: 1) clustering of wafer test probe landing area sites for parallel test sequencing; 2) on wafer test wiring that runs along the wafer's scribe regions; 3) on-wafer test wiring that can be scribed and yet thwart the spread of contamination into the product die; 4) an RFID tag design that allows for on-wafer testing without imposing substantial semiconductor surface area penalty; 5) an RFID tag design that includes built-in self test (BIST) circuitry for the RFID tag's non-volatile memory.
    Type: Application
    Filed: December 15, 2004
    Publication date: June 15, 2006
    Inventors: John Hyde, Robert Glidden, Andrew Horch, Jay Kuhn, Ronald Oliver
  • RFID tag with bist circuits
    Publication number: 20060125506
    Abstract: Technologies suitable for on-wafer testing in the ubiquitous computing era are disclosed. Among the inventive features disclosed are: 1) clustering of wafer test probe landing area sites for parallel test sequencing; 2) on wafer test wiring that runs along the wafer's scribe regions; 3) on-wafer test wiring that can be scribed and yet thwart the spread of contamination into the product die; 4) an RFID tag design that allows for on-wafer testing without imposing substantial semiconductor surface area penalty; 5) an RFID tag design that includes built-in self test (BIST) circuitry for the RFID tag's non-volatile memory.
    Type: Application
    Filed: December 15, 2004
    Publication date: June 15, 2006
    Inventors: Dennis Hara, Robert Glidden