Abstract: An imaging system may include a first and second cameras having a wide-angle lenses and processing circuitry. The first and second cameras capture respective first and second sets of image data that may be combined by the processing circuitry to generate wide-angle images of substantially all of a user's surroundings. The processing circuitry may track objects located around the user using the wide-angle images. The processing circuitry may issue an alert when tracked objects are determined to be a hazardous or when tracked objects may have been lost. The first camera may be formed on a cellular telephone held by the user and may face in front of the user, whereas the second camera may be formed on a wearable article and may face behind the user. In this way, the imaging system may monitor the user's surroundings even when the user is distracted by other tasks.

Abstract: An electronic device may have a camera module. The camera module may include a camera sensor capable of capturing foveated images. The camera sensor may be hardwired to capture foveated images with fixed regions of different quality levels or may be dynamically-reconfigurable to capture foveated images with selected regions of different quality levels. As one example, the camera module may be hardwired to capture a center region of an image at full resolution and peripheral regions at reduced resolutions, so that a user can merely center objects of interest in the image to capture a foveated image. As another example, the camera module may analyze previous images to identify objects of interest and may then reconfigure itself to capture the identified objects of interest at a high quality level, while capturing other regions at reduced quality levels.

Abstract: An electronic device may have a camera module. The camera module may include a camera sensor capable of capturing foveated images. The camera sensor may be hardwired to capture foveated images with fixed regions of different quality levels or may be dynamically-reconfigurable to capture foveated images with selected regions of different quality levels. As one example, the camera module may be hardwired to capture a center region of an image at full resolution and peripheral regions at reduced resolutions, so that a user can merely center objects of interest in the image to capture a foveated image. As another example, the camera module may analyze previous images to identify objects of interest and may then reconfigure itself to capture the identified objects of interest at a high quality level, while capturing other regions at reduced quality levels.

Abstract: An electronic device may have a camera module. The camera module may include a camera sensor divided into two or more regions. The various regions of the camera sensor may include lenses that filter different polarizations of incident light. As one example, a first half of the camera sensor may include a lens that passes unpolarized light to the first half of the camera sensor, while a second half of the camera sensor may include a lens that passes light of a particular polarization to the second half of the camera sensor. If desired, the camera sensor may include microlenses over individual image sensing pixels. Some of the microlenses may select for particular polarizations of incident light. The electronic device may include a component that emits structured or polarized light and the camera sensor may have lenses that are mapped to the light emitted by the component.

Abstract: A video processing circuit includes a processor that receives an encoded image having first and second regions, decodes the first region of the image, modifies the decoded first region, and re-encodes the modified first region. Such a circuit allows one to modify a region of an image by decoding and re-encoding only that region instead of the entire image. For example, if one wishes to overlay an EPG on a bottom portion of a video frame, then the circuit can decode only the EPG and the bottom portion of the frame, overlay the decoded EPG on the bottom frame portion, and re-encode the overlaid bottom frame portion. Therefore, this technique often reduces the processing time, and thus the cost and complexity of the processing circuit, as compared to a circuit that decodes and re-encode the entire frame during an image overlay process.

Abstract: A method of manufacturing integrated circuits uses an architecture having multiple processors and multiple memories, such that there is at least first and second groups of processors and memories. The first group has at least a first processor and at least a first memory. The second group has at least a second processor and at least a second memory. Regardless of where the architecture is sliced, the integrated circuits have a majority of the same address and data pin-outs.

Abstract: A baseline display system (10) is capable of receiving different types of input signals, analog or digital, having different horizontal and vertical input resolutions. The system uses serial video processors (SVPs) (33, 34, 43, 83) that have a given input size and spatial light modulators (SLMs) (18) that have a given output (display) resolution- The baseline system (10) is configurable to meet bandwidth requirements for displaying real time images on SLMs of increasing resolution. Data is decimated (downscaled) when appropriate to fit the SVP input size (FIGS. 4 and 8) and upscaled, vertically or horizontally, when appropriate to fit the SLM display resolution (FIGS. 3, 4, 7, and 8). Four systems (20, 50, 60, 90) , each appropriate for a different SLM resolution are described.

Abstract: A method of implementing pulse-width modulation in a display system (10, 20) that uses a spatial light modulator (SLM) (15) Each frame of data is divided into bit-planes, each bit-plane having one bit of data for each pixel of the SLM and representing a bit weight of the intensity value to be displayed by the pixels. Each bit-plane has a display time corresponding to a portion of the frame period, with bit-planes of more significant bits having longer portions. Then, the display times for one or more of the more significant bits are segmented so that the data for those bits can be displayed in segments rather than for a continuous time. (FIG. 3A). The segments are distributed throughout the frame period to reduce visual artifacts. (FIG. 3B).

Abstract: A method of manufacturing integrated circuits uses an architecture having multiple processors and multiple memories, such that there is at least first and second groups of processors and memories. The first group has at least a first processor and at least a first memory. The second group has at least a second processor and at least a second memory. Regardless of where the architecture is sliced, the integrated circuits have a majority of the same address and data pin-outs.