Patents by Inventor Robert Gregory Jukna

Robert Gregory Jukna has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8407657
    Abstract: A system for testing an electronic circuit board (ECB) having a plurality of test points in a pre-defined arrangement on a measurement device having a plurality of resources includes an interface fixture having a plurality of contact pads arranged in an array on a first surface. The contact pads can be electrically coupled to the plurality of resources of the measurement system according to a pre-defined pattern, where at least two of the contact pads are electrically coupled to one of the plurality of resources in a many-to-one relationship. The system also includes a test fixture removably attached to the first surface of the interface fixture. The test fixture includes an upper probe plate having a plurality of openings and a lower probe plate parallel to the upper probe plate. The lower probe plate includes a plurality of openings associated with the openings in the upper probe plate.
    Type: Grant
    Filed: March 22, 2012
    Date of Patent: March 26, 2013
    Assignee: Jabil Circuit, Inc.
    Inventors: Mark A. Dickson, Edward J. Collins, Robert Gregory Jukna
  • Publication number: 20120217988
    Abstract: A system for testing an electronic circuit board (ECB) having a plurality of test points in a pre-defined arrangement on a measurement device having a plurality of resources includes an interface fixture having a plurality of contact pads arranged in an array on a first surface. The contact pads can be electrically coupled to the plurality of resources of the measurement system according to a pre-defined pattern, where at least two of the contact pads are electrically coupled to one of the plurality of resources in a many-to-one relationship. The system also includes a test fixture removably attached to the first surface of the interface fixture. The test fixture includes an upper probe plate having a plurality of openings and a lower probe plate parallel to the upper probe plate.
    Type: Application
    Filed: March 22, 2012
    Publication date: August 30, 2012
    Inventors: Mark A. Dickson, Edward J. Collins, Robert Gregory Jukna
  • Patent number: 8166446
    Abstract: A system for testing an electronic circuit board (ECB) having a plurality of test points in a pre-defined arrangement on a measurement device having a plurality of resources includes an interface fixture having a plurality of contact pads arranged in an array on a first surface. The contact pads can be electrically coupled to the plurality of resources of the measurement system according to a pre-defined pattern, where at least two of the contact pads are electrically coupled to one of the plurality of resources in a many-to-one relationship. The system also includes a test fixture removably attached to the first surface of the interface fixture. The test fixture includes an upper probe plate having a plurality of openings and a lower probe plate parallel to the upper probe plate. The lower probe plate includes a plurality of openings associated with the openings in the upper probe plate.
    Type: Grant
    Filed: July 15, 2008
    Date of Patent: April 24, 2012
    Assignee: Jabil Circuit, Inc.
    Inventors: Mark A. Dickson, Edward J. Collins, Robert Gregory Jukna
  • Publication number: 20090072849
    Abstract: A system for testing an electronic circuit board (ECB) having a plurality of test points in a pre-defined arrangement on a measurement device having a plurality of resources includes an interface fixture having a plurality of contact pads arranged in an array on a first surface. The contact pads can be electrically coupled to the plurality of resources of the measurement system according to a pre-defined pattern, where at least two of the contact pads are electrically coupled to one of the plurality of resources in a many-to-one relationship. The system also includes a test fixture removably attached to the first surface of the interface fixture. The test fixture includes an upper probe plate having a plurality of openings and a lower probe plate parallel to the upper probe plate. The lower probe plate includes a plurality of openings associated with the openings in the upper probe plate.
    Type: Application
    Filed: July 15, 2008
    Publication date: March 19, 2009
    Applicant: Jabil Circuit, Inc.
    Inventors: Mark A. Dickson, Edward J. Collins, Robert Gregory Jukna