Abstract: An edge ring arrangement for a processing chamber includes a first ring configured to surround and overlap a radially outer edge of an upper plate of a pedestal arranged in the processing chamber, a second ring arranged below the first moveable ring, wherein a portion of the first ring overlaps the second ring, a first actuator configured to actuate a first pillar to selectively move the first ring to a raised position and a lowered position relative to the pedestal, and a second actuator configured to actuate a second pillar to selectively move the second ring to a raised position and a lowered position relative to the pedestal.

Abstract: A substrate processing system includes a processing chamber and a pedestal arranged in the processing chamber. An edge coupling ring is arranged adjacent to a radially outer edge of the pedestal. A first actuator is configured to selectively move the edge coupling ring to a raised position, relative to the pedestal to provide clearance between the edge coupling ring and the pedestal to allow a robot arm to remove the edge coupling ring from the processing chamber.

Abstract: An edge ring is configured to be raised and lowered relative to a pedestal, via one or more lift pins, in a processing chamber of a substrate processing system. The edge ring includes an upper surface, an annular inner diameter, an annular outer diameter, a lower surface, and at least one feature arranged in the lower surface of the edge ring. At least one inner surface of the at least one feature is sloped.

Abstract: A fluid handling component for a vacuum chamber of a semiconductor substrate processing apparatus is provided. The fluid handling component comprises interior fluid wetted surfaces and an atomic layer deposition (ALD) or molecular layer deposition (MLD) barrier coating on the interior fluid wetted surfaces wherein the fluid wetted surfaces which include the ALD or MLD barrier coating are configured to be contacted by a process gas and/or fluid during a semiconductor substrate processing process wherein the ALD or MLD barrier coating protects the underlying fluid wetted surfaces from erosion and/or corrosion.

Abstract: A coating system for forming an atomic layer deposition (ALD) or a molecular layer deposition (MLD) barrier coating on interior fluid wetted surfaces of a fluid handling component for a vacuum chamber of a semiconductor substrate processing apparatus. The coating system includes the fluid handling component, wherein the interior fluid wetted surfaces define a process region of the coating system, a gas supply system in fluid communication with the process region of the component wherein the gas supply system supplies process gases to the process region of the component through the inlet port thereof such that an ALD or MLD barrier coating can be formed on the fluid wetted surfaces of the fluid handling component, and an exhaust system in fluid communication with the process region of the component wherein the exhaust system exhausts the process gases from the process region of the component through the outlet port thereof.

Abstract: A method for calculating power input to at least one thermal control element of an electrostatic chuck includes: setting the at least one thermal control element to a first predetermined power level; measuring a first temperature of the at least one thermal control element when the at least one thermal control element is powered at the first predetermined power level; setting the at least one thermal control element to a second predetermined power level; measuring a second temperature of the at least one thermal control element when the at least one thermal control element is powered at the second predetermined power level; calculating a difference between the first temperature and the second temperature; calculating a system response of the at least one thermal control element based on the difference; inverting the system response; and calibrating the at least one thermal control element based on the inverted system response.

Abstract: A substrate processing system includes a processing chamber and a pedestal arranged in the processing chamber. An edge coupling ring is arranged adjacent to a radially outer edge of the pedestal. A first actuator is configured to selectively move the edge coupling ring to a raised position, relative to the pedestal to provide clearance between the edge coupling ring and the pedestal to allow a robot arm to remove the edge coupling ring from the processing chamber.

Abstract: A method for calculating power input to at least one thermal control element of an electrostatic chuck includes: setting the at least one thermal control element to a first predetermined power level; measuring a first temperature of the at least one thermal control element when the at least one thermal control element is powered at the first predetermined power level; setting the at least one thermal control element to a second predetermined power level; measuring a second temperature of the at least one thermal control element when the at least one thermal control element is powered at the second predetermined power level; calculating a difference between the first temperature and the second temperature; calculating a system response of the at least one thermal control element based on the difference; inverting the system response; and calibrating the at least one thermal control element based on the inverted system response.

Abstract: A coating system for forming an atomic layer deposition (ALD) or a molecular layer deposition (MLD) barrier coating on interior fluid wetted surfaces of a fluid handling component for a vacuum chamber of a semiconductor substrate processing apparatus. The coating system includes the fluid handling component, wherein the interior fluid wetted surfaces define a process region of the coating system, a gas supply system in fluid communication with the process region of the component wherein the gas supply system supplies process gases to the process region of the component through the inlet port thereof such that an ALD or MLD barrier coating can be formed on the fluid wetted surfaces of the fluid handling component, and an exhaust system in fluid communication with the process region of the component wherein the exhaust system exhausts the process gases from the process region of the component through the outlet port thereof.

Abstract: A semiconductor plasma processing apparatus used to process semiconductor components comprises a plasma processing chamber, a process gas source in fluid communication with the plasma processing chamber for supplying a process gas into the plasma processing chamber, a RF energy source adapted to energize the process gas into the plasma state in the plasma processing chamber, and a vacuum port for exhausting process gas from the plasma processing chamber. The semiconductor plasma processing apparatus further comprises at least one component wherein the component has a body which has a relative magnetic permeability of about 70,000 or greater and a cold sprayed electrically conductive and nonmagnetic coating on a surface of the body wherein the coating has a thickness greater than the skin depth of a RF current configured to flow therethrough during plasma processing.

Abstract: A two piece edge ring assembly is configured to surround a semiconductor substrate in a plasma processing chamber wherein plasma is generated and used to process the semiconductor substrate. The edge ring assembly comprises upper and lower rings which have an outer protective coating. The upper and lower rings are configured such that the upper ring is supported on an outer portion of the upper surface of the lower ring and the protective coatings are on plasma exposed surfaces of the upper and lower rings.

Abstract: A wafer handling mechanism is operated to place a wafer on a chuck. A chucking force is then applied to the wafer, whereby wafer support features of the chuck transfer a defect pattern onto a surface of the wafer. The surface of the wafer is analyzed by a defect metrology tool to obtain a mapping of the defect pattern transferred onto the surface of the wafer. A center coordinate of the chuck within a coordinate system of the wafer is determined by analyzing the defect pattern as transferred to the surface of the wafer. A spatial offset between the center coordinate of the chuck and the center of the wafer is determined. The spatial offset is used to adjust the wafer handling mechanism so as to enable alignment of the center of the wafer to the center coordinate of the chuck.

Abstract: A wafer handling mechanism is operated to place a wafer on a chuck. A chucking force is then applied to the wafer, whereby wafer support features of the chuck transfer a defect pattern onto a surface of the wafer. The surface of the wafer is analyzed by a defect metrology tool to obtain a mapping of the defect pattern transferred onto the surface of the wafer. A center coordinate of the chuck within a coordinate system of the wafer is determined by analyzing the defect pattern as transferred to the surface of the wafer. A spatial offset between the center coordinate of the chuck and the center of the wafer is determined. The spatial offset is used to adjust the wafer handling mechanism so as to enable alignment of the center of the wafer to the center coordinate of the chuck.