Patents by Inventor Robert H. Wardwell

Robert H. Wardwell has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7094063
    Abstract: An interconnect formed using a stiff layer having a plurality of holes extending there through. A first flexible layer is bonded to a first side of the stiff layer. The first flexible layer having a plurality of conductive bumps, each conductive bump being positioned over a hole. A second flexible layer is bonded to a second side of the stiff layer. The second flexible layer having a plurality of conductive bumps, each conductive bump being positioned over a hole. Signal paths are formed in the holes, the signal paths connecting the plurality of conductive bumps on the first layer to the plurality of conductive bumps on the second layer.
    Type: Grant
    Filed: April 30, 2004
    Date of Patent: August 22, 2006
    Assignee: Agilent Technologies, Inc.
    Inventors: Bob J. Self, Donald M. Logelin, Robert H. Wardwell
  • Patent number: 6864696
    Abstract: A probe that connects test and measurement equipment to a device under test via a plurality of cables. The probe is formed of a plurality of printed circuit boards that are stacked together. Each board is connected to one of the plurality of cables and has a longitudinal set of pads along an edge electrically connected to the cable. The stacked plurality of printed circuit boards form a two dimensional array of pads for connecting to a similar set of pads on a device under test.
    Type: Grant
    Filed: October 31, 2002
    Date of Patent: March 8, 2005
    Assignee: Agilent Technologies, Inc.
    Inventors: Donald M. Logelin, Bob J. Self, Robert H. Wardwell
  • Patent number: 6776662
    Abstract: An adapter for attaching a connector having a plurality of pads for interfacing with a device under test. The adapter comprises a carrier having a plurality of voids formed therein in a pattern matching connections on the connector, said voids traversing from a first surface to a second surface of the carrier. At least one electrical component is embedded in at least one void, the at least one electrical component forms a first adapter pad on the first surface of the carrier and a second adapter pad on the second surface of the carrier. When the adapter is interposed between the connector and the device under test the electrical component becomes part of the circuit of the device under test and the connector.
    Type: Grant
    Filed: September 27, 2002
    Date of Patent: August 17, 2004
    Assignee: Agilent Technologies, Inc.
    Inventors: Bob J. Self, Robert H. Wardwell
  • Publication number: 20040085081
    Abstract: A probe that connects test and measurement equipment to a device under test via a plurality of cables. The probe is formed of a plurality of printed circuit boards that are stacked together. Each board is connected to one of the plurality of cables and has a longitudinal set of pads along an edge electrically connected to the cable. The stacked plurality of printed circuit boards form a two dimensional array of pads for connecting to a similar set of pads on a device under test.
    Type: Application
    Filed: October 31, 2002
    Publication date: May 6, 2004
    Inventors: Donald M. Logelin, Bob J. Self, Robert H. Wardwell
  • Publication number: 20040063342
    Abstract: An adapter for attaching a connector having a plurality of pads to a device under test. The adapter is comprised of two types of parts a carrier cradle and at least one circuit substrate. The circuit substrate has plurality of pads formed on a first and second edge. A plurality of circuits are formed on a first side of the circuit substrate, each circuit connecting a pad on the first edge of the circuit substrate to a pad on the second edge of the circuit substrate. The circuit substrate is supported by the carrier cradle such that the pads on the first edge of the circuit substrate align with the first side of the carrier cradle and the pads on the second edge of the circuit substrate align with the second side of the circuit substrate, whereby when the adapter is interposed between the connector and the device under test the circuits electrically connect the device under test to the connector.
    Type: Application
    Filed: September 27, 2002
    Publication date: April 1, 2004
    Inventors: Bob J. Self, Robert H. Wardwell
  • Publication number: 20040063356
    Abstract: An adapter for attaching a connector having a plurality of pads for interfacing with a device under test. The adapter comprises a carrier having a plurality of voids formed therein in a pattern matching connections on the connector, said voids traversing from a first surface to a second surface of the carrier. At least one electrical component is embedded in at least one void, the at least one electrical component forms a first adapter pad on the first surface of the carrier and a second adapter pad on the second surface of the carrier. When the adapter is interposed between the connector and the device under test the electrical component becomes part of the circuit of the device under test and the connector.
    Type: Application
    Filed: September 27, 2002
    Publication date: April 1, 2004
    Inventors: Bob J. Self, Robert H. Wardwell
  • Patent number: 6712622
    Abstract: An adapter for attaching a connector having a plurality of pads to a device under test. The adapter is comprised of two types of parts a carrier cradle and at least one circuit substrate. The circuit substrate has plurality of pads formed on a first and second edge. A plurality of circuits are formed on a first side of the circuit substrate, each circuit connecting a pad on the first edge of the circuit substrate to a pad on the second edge of the circuit substrate. The circuit substrate is supported by the carrier cradle such that the pads on the first edge of the circuit substrate align with the first side of the carrier cradle and the pads on the second edge of the circuit substrate align with the second side of the circuit substrate, whereby when the adapter is interposed between the connector and the device under test the circuits electrically connect the device under test to the connector.
    Type: Grant
    Filed: September 27, 2002
    Date of Patent: March 30, 2004
    Assignee: Agilent Technologies, Inc.
    Inventors: Bob J. Self, Robert H. Wardwell
  • Publication number: 20040043640
    Abstract: An interconnect having a stiff layer, such as a PCB, having a plurality of holes therein. A first flexible layer is bonded to a first side of the stiff layer, the first flexible layer having a plurality of conductive bumps thereon positioned over holes. A second flexible layer is bonded to a second side of the stiff layer, the second flexible layer having a plurality of conductive bumps thereon positioned over holes. Vias connect the plurality of conductive bumps on the first layer to the plurality of conductive bumps on the second layer.
    Type: Application
    Filed: August 30, 2002
    Publication date: March 4, 2004
    Inventors: Bob J. Self, Donald M. Logelin, Robert H. Wardwell
  • Patent number: 5923177
    Abstract: A portable wedge probe for perusing the signals of an IC is produced by mounting a short row of wedges in a housing that serves the dual purposes of: (1) Allowing the gripping and manipulation of the wedges for inspection, the connecting and unconnecting of interconnecting cables, deployment onto, and removal from, the IC; and (2) serving as the housing for and physical location of electrical interconnection(s) between the portable wedge probe and the cable(s) of the measurement (test) equipment. By the term "short row of wedges" we mean, say, two adjacent wedges for the signal on a single intervening interior pin of the IC, up to perhaps nine adjacent wedges for the eight signals on the eight intervening interior pins of the IC, as opposed to having the row of wedges being long enough to engage the entire side of the IC. The portable wedge probe is free standing once applied, and does not rely upon support from another row of wedges deployed on a different side of the IC.
    Type: Grant
    Filed: March 27, 1997
    Date of Patent: July 13, 1999
    Assignee: Hewlett-Packard Company
    Inventor: Robert H. Wardwell
  • Patent number: 5701086
    Abstract: A probe for making electrical connections to the legs of an already mounted integrated circuit carries rows of tapered wedges. The wedges within a row are spaced apart by an amount that corresponds to the width of the IC's legs. For n-many legs on a side of the IC there are n+1 corresponding wedges, which then have n-many intervening spaces. As the positioned probe is pressed down the spaces between the wedges receive the legs of the IC, and wedges become wedged between the IC's legs. Each wedge has left and right conductive surfaces separated by an insulator. Each leg of the IC has a wedge to its left and a wedge to its right. Within the probe the right-hand conductive surface of the wedge to the left of a leg, and the left-hand conductive surface of the wedge to the right of that leg, are electrically connected together. Thus, the probe makes electrical contact to each leg in two places. The tapered wedges are of Ni- and Au-plated BeCu separated by acrylic adhesive and Kapton.
    Type: Grant
    Filed: October 26, 1993
    Date of Patent: December 23, 1997
    Assignee: Hewlett-Packard Company
    Inventor: Robert H. Wardwell
  • Patent number: 5507652
    Abstract: A wedge connector for integrated circuits comprises tapered fingers of conductive metal separated by an insulator. The tapered fingers are wedge-shaped, in that they are thinnest at their tips, so that they may more easily enter the space between adjacent legs of an integrated circuit (IC). A row of wedges is assembled, and spaced apart to interdigitate with the legs of the IC. The IC legs have sides that face each other along the direction of the row, and that are separated by the amount of the inter-leg spacing. The tapered fingers or wedges penetrate into the inter-leg space and contact the facing sides of the IC legs. Thus, the left-hand side of a wedge entering a particular inter-leg space will come into electrical contact with the right-hand side of the IC leg on the left of that inter-leg space, and the right-hand side of that wedge will come into electrical contact with left-hand side of the IC leg on the right of that inter-leg space.
    Type: Grant
    Filed: February 17, 1995
    Date of Patent: April 16, 1996
    Assignee: Hewlett-Packard Company
    Inventor: Robert H. Wardwell
  • Patent number: 5463324
    Abstract: A probe for making electrical connections to the legs of an already mounted integrated circuit carries rows of tapered wedges. The wedges within a row are spaced apart by an amount that corresponds to the width of the IC's legs. For n-many legs on a side of the IC there are n+1 corresponding wedges, which then have n-many intervening spaces. As the positioned probe is pressed down the spaces between the wedges receive the legs of the IC, and wedges become wedged between the IC's legs. Each wedge has left and right conductive surfaces separated by an insulator. Each leg of the IC has a wedge to its left and a wedge to its right. Within the probe the right-hand conductive surface of the wedge to the left of a leg, and the left-hand conductive surface of the wedge to the right of that leg, are electrically connected together. Thus, the probe makes electrical contact to each leg in two places. The tapered wedges are of Ni- and Au-plated BeCu separated by acrylic adhesive and Kapton.
    Type: Grant
    Filed: October 26, 1993
    Date of Patent: October 31, 1995
    Assignee: Hewlett-Packard Company
    Inventors: Robert H. Wardwell, Durwood Airhart
  • Patent number: 5205741
    Abstract: A non-invasive connector for testing an integrated circuit package has a connector housing with a substantially rectangular recess adapted to fit over the integrated circuit package. A plurality of teeth made of an insulative material extend laterally inward from the edges of the connector housing into the recess. The spacing between the teeth is predetermined to enable the teeth to be removably inserted between the integrated circuit leads as said connector housing is fitted in place. Test leads extend from the connector housing into the space between said teeth to make electrical contact with the integrated circuit leads. Electrical connections are provided through the connector housing between these test leads and external testing equipment by means of pins and a flexible circuit assembly. In addition, an elastomeric pad can be positioned between the connector housing and the test leads to exert an inward biasing force against the test leads to maintain electrical contact with the integrated circuit leads.
    Type: Grant
    Filed: August 14, 1991
    Date of Patent: April 27, 1993
    Assignee: Hewlett-Packard Company
    Inventors: Michael J. Steen, Robert H. Wardwell, Joseph A. McKenzie, Jr.