Patents by Inventor Robert Han Wu

Robert Han Wu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5729677
    Abstract: Content testing (302-306) and comparator testing (312-326) of a tag section (24, 26) of a cache tag memory array is performed to confirm that the tag section (24, 26) is functional. For content testing (302-306), each tag location is tested once. Comparator testing (312-326) is performed to determine the functionality of the comparator (240, 260) of the cache tag memory array. The number of tests performed for the comparator testing is 2.times.M+2, where M is the number of bit positions in the tag location. Two of the tests are for testing the comparator's ability to identify correctly hits within the tag section (312-316). The other tests are for testing the comparator's ability to identify correctly misses within the tag section at each bit position of the tag locations (322-326).
    Type: Grant
    Filed: July 31, 1995
    Date of Patent: March 17, 1998
    Assignee: Motorola Inc.
    Inventors: Robert Han Wu, Jerome A. Gerner, Richard A. Wheelus
  • Patent number: 5644581
    Abstract: Logic test vectors, used for testing logic circuitry on a logic tester, are converted to test patterns having a format that is used by a memory tester. This allows an integrated circuit having both logic circuitry and a memory array to be tested on a memory tester. A software tool, or computer program, is used to convert the logic test vectors to test patterns, and also generates the memory test code for applying the test patterns to, for example, a logic intensive integrated circuit memory. The software tool is encoded using a high-level programming language and is executed on a computer system (60). The program allows the logic intensive integrated circuit memory to be tested on a memory tester, as compared to testing the integrated circuit memory on a logic tester, significantly reducing testing costs associated with manufacturing.
    Type: Grant
    Filed: June 26, 1995
    Date of Patent: July 1, 1997
    Assignee: Motorola, Inc.
    Inventor: Robert Han Wu