Abstract: Circuits and methods for jitter compensation in a receiver system are useful to improve performance. One such circuit includes a combiner block for combining a reference signal with an input signal (Sin) of the circuit, and a converter stage for converting the input signal (Sin) together with the reference signal. The converter stage is clocked by a clock signal modulated by a jitter signal. A forward path having a first mixer unit is provided for multiplying a copy of an output signal (A) of the converter stage with the frequency of the reference signal in order to generate a jitter compensating signal (B). A compensation unit for compensating jitter in the output signal (A) of the converter stage in a direct output path with the jitter compensating signal (B) is also provided.

Abstract: The present invention relates to a circuit and a method for jitter compensation in a receiver system and for improving the SNR and/or the BER performance. The circuit for jitter compensation comprises: a combiner block (600) for combining a reference signal with an input signal (Sin) of said circuit (700, 900, 1000); a converter stage (605) for converting said input signal (Sin) together with said reference signal, said converter stage (605) being clocked by a clock signal modulated by a jitter signal; a forward path (631) having a first mixer unit (610) for multiplying a copy of an output signal (A) of said converter stage (605) with the frequency of said reference signal for generating a jitter compensating signal (B); and a compensation unit (608) for compensating jitter in said output signal (A) of said converter stage (605) in a direct output path (632) with said jitter compensating signal (B).

Abstract: The A/D converter has a digital output for outputting a digital output signal selected from a set of three or more available values. A feedback loop generates the digital output signal so that a time averaged difference between an analog input signal and an analog feedback signal representative of the digital output signal is minimized. A feedback signal generator generates successive signal levels of the feedback signal. A return to zero switch inserts predetermined return to zero levels between the signal levels in the feedback signal. The return to zero switch is also used to provide the signal level for one of the available values.

Abstract: A first and second signal source are coupled to an analog output in a digital input signal dependent configuration. The signal sources so that a contribution of their source signals adds up in a first or a second direction when the digital input assumes a first or a second value respectively. The source signals counteract each other when the digital input signal assumes a third value. The signs with which the source signals contribute to the analog signal level for the third value are alternated, so that both signs occur substantially equally frequently for each of the signal sources. The spectral density of a deviation signal due to said alternating is concentrated at high frequencies. In an embodiment the spectral density is moved to high frequency by modulating the alternation onto a high frequency alternation that is used to generate return to zero levels between digital input signal dependent levels.