Abstract: A network monitoring system is provided that includes a plurality of tiers being arranged in a network having a plurality of hardware and software resources for executing a selective number of applications. The tiers include disparate technology stack formats. A platform resource receives monitoring information from the tiers in their respective disparate technology formats and stores the monitoring information where the monitoring information is normalized into a format that is universally recognized. An aggregation presentation module aggregates and analyzes the monitoring information from the platform resource to determine if there are any anomalies of the hardware and software resources, and formats the monitoring information to be presented as selected real-time performance analytics to a user.

Abstract: A network monitoring system is provided that includes a plurality of tiers being arranged in a network having a plurality of hardware and software resources for executing a selective number of applications. The tiers include disparate technology stack formats. A platform resource receives monitoring information from the tiers in their respective disparate technology formats and stores the monitoring information where the monitoring information is normalized into a format that is universally recognized. An aggregation presentation module aggregates and analyzes the monitoring information from the platform resource to determine if there are any anomalies of the hardware and software resources, and formats the monitoring information to be presented as selected real-time performance analytics to a user.

Abstract: A system and method to provide injection of important data directly into a processor's cache location when that processor has previously indicated interest in the data. The memory subsystem at a target processor will determine if the memory address of data to be written to a memory location associated with the target processor is found in a processor cache of the target processor. If it is determined that the memory address is found in a target processor's cache, the data will be directly written to that cache at the same time that the data is being provided to a location in main memory.

Abstract: A system and method to provide injection of important data directly into a processor's cache location when that processor has previously indicated interest in the data. The memory subsystem at a target processor will determine if the memory address of data to be written to a memory location associated with the target processor is found in a processor cache of the target processor. If it is determined that the memory address is found in a target processor's cache, the data will be directly written to that cache at the same time that the data is being provided to a location in main memory.

Abstract: An apparatus is provided for thermally processing substrates held in a carrier. The apparatus includes an injection system which provides for selectable injection of gases to the process chamber. The injection system comprises one or more elongated injection tubes having a plurality of injection ports or orifices distributed in the tubes for directing flow of reactant and other gases across the surface of each substrate. The elongated injection tubes are rotatable about an axis in 360 degrees.

Abstract: The invention is a replication method that requires only one copy of a packet entering a multiport switch to be transmitted from the input port, the method acquiring the deadlock avoidance advantages of virtual cut-through operation. The goal is achieved via a central buffer, with replication occurring during the read of the chunk out of the central buffer by the output ports.

Abstract: A quiesced and synchronous distributed data processing system includes a primary node, a secondary node and a switch between the primary and secondary nodes. The TOD for the primary node is set depending on the system. The invention sets the TOD for the switch based on the TOD of the primary node. The primary node then verifies the switch TOD. If verified, the TOD for the secondary node is set, based on the TOD of the primary node. Finally, the secondary node self-verifies its TOD.

Abstract: A quiesced and synchronous distributed data processing system includes a primary node, a secondary node and a switch between the primary and secondary nodes. The TOD for the primary node is set depending on the system. The invention sets the TOD for the switch based on the TOD of the primary node. The primary node then verifies the switch TOD. If verified, the TOD for the secondary node is set, based on the TOD of the primary node. Finally, the secondary node self-verifies its TOD.