Abstract: A circuit for use in a peripheral interface unit of a microprocessor-based system that actively drives a tri-state data strobe acknowledge (DSACK*) signal to a logical low state after a delay following assertion of an address strobe by the microprocessor. The DSACK* signal is then actively driven to a logical high state in response to deassertion of the address strobe. The DSACK* signal is then returned to a high impedance state. A Schmitt trigger feedback circuit guarantees that the resulting digital "high" level in the high impedance state will exceed a defined, minimum voltage level, regardless of the circuit's capacitance load.