Abstract: A dynamically-operating restoration circuit is used to apply a voltage or current restore pulse signal to thyristor-based memory cells and therein restore data in the cell using the internal positive feedback loop of the thyristor. In one example implementation, the internal positive feedback loop in the thyristor is used to restore the conducting state of a device after the thyristor current drops below the holding current. A pulse and/or periodic waveform are defined and applied to ensure that the thyristor is not released from its conducting state. The time average of the periodic restore current in the thyristor may be lower than the holding current threshold. While not necessarily limited to memory cells that are thyristor-based, various embodiments of the invention have been found to be the particularly useful for high-speed, low-power memory cells in which a thin capacitively-coupled thyristor is used to provide a bi-stable storage element.

Abstract: A dynamically-operating restoration circuit is used to apply a voltage or current restore pulse signal to thyristor-based memory cells and therein restore data in the cell using the internal positive feedback loop of the thyristor. In one example implementation, the internal positive feedback loop in the thyristor is used to restore the conducting state of a device after the thyristor current drops below the holding current. A pulse and/or periodic waveform are defined and applied to ensure that the thyristor is not released from its conducting state. The time average of the periodic restore current in the thyristor may be lower than the holding current threshold. While not necessarily limited to memory cells that are thyristor-based, various embodiments of the invention have been found to be the particularly useful for high-speed, low-power memory cells in which a thin capacitively-coupled thyristor is used to provide a bi-stable storage element.

Abstract: A dynamically-operating restoration circuit is used to apply a voltage or current restore pulse signal to thyristor-based memory cells and therein restore data in the cell using the internal positive feedback loop of the thyristor. In one example implementation, the internal positive feedback loop in the thyristor is used to restore the conducting state of a device after the thyristor current drops below the holding current. A pulse and/or periodic waveform are defined and applied to ensure that the thyristor is not released from its conducting state. The time average of the periodic restore current in the thyristor may be lower than the holding current threshold. While not necessarily limited to memory cells that are thyristor-based, various embodiments of the invention have been found to be the particularly useful for high-speed, low-power memory cells in which a thin capacitively-coupled thyristor is used to provide a bi-stable storage element.

Abstract: Minimal memory access times are realized by using a single access to a read-modify-write bank. read-modify-write memory including at least one read-or-write bank is operated in a manner that uses at most one access to each of the at least one read-or-write banks for each read-modify-write access to the memory during a memory cycle. The access can be effected during a single clock cycle and can be used for read, write and read-modify-write memory access.

Abstract: A dynamically-operating restoration circuit is used to apply a voltage or current restore pulse signal to thyristor-based memory cells and therein restore data in the cell using the internal positive feedback loop of the thyristor. In one example implementation, the internal positive feedback loop in the thyristor is used to restore the conducting state of a device after the thyristor current drops below the holding current. A pulse and/or periodic waveform are defined and applied to ensure that the thyristor is not released from its conducting state. The time average of the periodic restore current in the thyristor may be lower than the holding current threshold. While not necessarily limited to memory cells that are thyristor-based, various embodiments of the invention have been found to be the particularly useful for high-speed, low-power memory cells in which a thin capacitively-coupled thyristor is used to provide a bi-stable storage element.

Abstract: A dynamically-operating restoration circuit (106) is used to apply a voltage or current restore pulse signal to thyristor-based memory cells (108) and therein restore data in the cell using the internal positive feedback loop of the thyristor (110). In one example implementation, the internal positive feedback loop in the thyristor (110) is used to restore the conducting state of a device after the thyristor current drops below the holding current. A pulse and/or periodic waveform are defined and applied to ensure that the thyristor is not released from its conducting state. The time average of the periodic restore current in the thyristor may be lower than the holding current threshold. While not necessarily limited to memory cells that are thyristor-based, various embodiments of the invention have been found to be the particularly useful for high-speed, low-power memory cells in which a thin capacitively-coupled thyristor is used to provide a bi-stable storage element.

Abstract: Minimal memory access times are realized by using a single access to a read-modify-write bank. A read-modify-write memory including at least one read-or-write bank is operated in a manner that uses at most one access to each of the at least one read-or-write banks for each read-modify-write access to the memory during a memory cycle. The access can be effected during a single clock cycle and can be used for read, write and read-modify-write memory access.

Abstract: The soft error rate in a semiconductor memory is improved via the use of a circuit and arrangement adapted to use a mirror bit to recover from a soft error. According to an example embodiment of the present invention, a semiconductor device includes first and mirror memory cells configured and arranged to receive and store a same bit in response to a write operation, with the memory cells more susceptible to a bit error in which the stored bit changes from a first state to a second state than to a change from the second state into the first state. The memory cells are separated by a distance that is sufficient to make the likelihood of both memory cells being upset by a same source very low. For a read operation, the bits stored at the fist and second memory cells are compared. If the bits are the same, the bit from the first and/or mirror bit is read out, and if the bits are different, a bit corresponding to the more susceptible state is read out. In this manner, soft errors can be overcome.

Abstract: A dynamically-operating restoration circuit (106) is used to apply a voltage or current restore pulse signal to thyristor-based memory cells (108) and therein restore data in the cell using the internal positive feedback loop of the thyristor (110). In one example implementation, the internal positive feedback loop in the thyristor (110) is used to restore the conducting state of a device after the thyristor current drops below the holding current A pulse and/or periodic waveform are defined and applied to ensure that the thyristor is not released from its conducting state. The time average of the periodic restore current in the thyristor may be lower than the holding current threshold. While not necessarily limited to memory cells that are thyristor-based, various embodiments of the invention have been found to be the particularly useful for high-speed, low-power memory cells in which a thin capacitively-coupled thyristor is used to provide a bi-stable storage element.