Patents by Inventor Robert Hormuth
Robert Hormuth has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9836378Abstract: An information handling system (IHS) is disclosed wherein the system includes a processor associated with at least one performance state (P-state), and a memory in communication with the processor. The memory is operable to store a virtualization software and a basic input/out system (BIOS). The BIOS is configured to report a parameter of the P-state to the virtualization software. In addition, the BIOS is configured to transition the processor into a desired P-state. A method for managing performance states in an information handling system (IHS) is further disclosed wherein the method includes providing a basic input/output system (BIOS) in communication with a processor, the processor associated with an at least one performance state (P-state) and reporting a parameter of the at least one P-state to a virtualization software via the BIOS. The method further includes transitioning the processor to a desired P-state via the BIOS.Type: GrantFiled: December 9, 2015Date of Patent: December 5, 2017Assignee: Dell Products L.P.Inventors: Mukund Purshottam Khatri, Tuyet-Huong Thi Nguyen, Vijay Nijhawan, Robert Hormuth
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Patent number: 9473312Abstract: Systems and methods for “Wake on Application” (WOA). An Information Handling System (IHS) may include a logic circuit and a memory having instructions that, upon execution, cause the IHS to: receive a WOA packet while the IHS is in a first power state, where the WOA packet identifies at least one of a software application or virtual server residing within the IHS; and, in response to having received the WOA packet, operate in a second power state and launch the software application or wake up the virtual server. A method may include originating, via a first IHS, a single WOA packet; and transmitting the single WOA packet over a network, where the single WOA packet is configured to cause a second IHS to switch operation from a first power state to a second power state, and to launch a software application or wake up a virtual server.Type: GrantFiled: September 6, 2013Date of Patent: October 18, 2016Assignee: DELL PRODUCTS, L.P.Inventors: Robert Winter, Robert Hormuth
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Publication number: 20160098338Abstract: An information handling system (IHS) is disclosed wherein the system includes a processor associated with at least one performance state (P-state), and a memory in communication with the processor. The memory is operable to store a virtualization software and a basic input/out system (BIOS). The BIOS is configured to report a parameter of the P-state to the virtualization software. In addition, the BIOS is configured to transition the processor into a desired P-state. A method for managing performance states in an information handling system (IHS) is further disclosed wherein the method includes providing a basic input/output system (BIOS) in communication with a processor, the processor associated with an at least one performance state (P-state) and reporting a parameter of the at least one P-state to a virtualization software via the BIOS. The method further includes transitioning the processor to a desired P-state via the BIOS.Type: ApplicationFiled: December 9, 2015Publication date: April 7, 2016Inventors: Mukund Purshottam Khatri, Tuyet-Huong Thi Nguyen, Vijay Nijhawan, Robert Hormuth
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Publication number: 20150074432Abstract: Systems and methods for “Wake on Application” (WOA). An Information Handling System (IHS) may include a logic circuit and a memory having instructions that, upon execution, cause the IHS to: receive a WOA packet while the IHS is in a first power state, where the WOA packet identifies at least one of a software application or virtual server residing within the IHS; and, in response to having received the WOA packet, operate in a second power state and launch the software application or wake up the virtual server. A method may include originating, via a first IHS, a single WOA packet; and transmitting the single WOA packet over a network, where the single WOA packet is configured to cause a second IHS to switch operation from a first power state to a second power state, and to launch a software application or wake up a virtual server.Type: ApplicationFiled: September 6, 2013Publication date: March 12, 2015Applicant: Dell Products, L.P.Inventors: Robert Winter, Robert Hormuth
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Patent number: 8127296Abstract: A system and method for performing a VM migration which manages a cluster of machines in a pool for live migration to the same feature set or behavior. In certain embodiments, machines within the pool can be configured to emulate a certain feature set to enable a VM migration amongst the similar pools. The emulation can be by either masking reporting of a feature set or enabling/disabling a feature set. The handling of emulation registers within the hardware occurs at a firmware level rather than an operating system or hypervisor level.Type: GrantFiled: September 6, 2007Date of Patent: February 28, 2012Assignee: Dell Products L.P.Inventors: Mukund Khatri, Robert Hormuth
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Publication number: 20090070760Abstract: A system and method for performing a VM migration which manages a cluster of machines in a pool for live migration to the same feature set or behavior. In certain embodiments, machines within the pool can be configured to emulate a certain feature set to enable a VM migration amongst the similar pools. The emulation can be by either masking reporting of a feature set or enabling/disabling a feature set. The handling of emulation registers within the hardware occurs at a firmware level rather than an operating system or hypervisor level.Type: ApplicationFiled: September 6, 2007Publication date: March 12, 2009Inventors: Mukund Khatri, Robert Hormuth
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Patent number: 6425033Abstract: A Wide Area Serial PCI system for connecting peripheral devices to a computer. The WASP system includes a host computer system connected through a serial bus to a remote device. The serial bus can range from several meters to several kilometers or more. The host computer system includes a CPU and memory, and also includes a first Peripheral Component Interconnect (PCI) bus, also referred to as the local PCI bus. A primary bridge according to the present invention is coupled to the first PCI bus. The primary bridge includes PCI interface circuitry for interfacing to the first PCI bus. The remote device is located remotely from the computer system and comprises a second or remote PCI bus and one or more peripheral devices coupled to the second PCI bus. The remote device also includes a secondary bridge coupled to the second PCI bus. The secondary bridge includes PCI interface circuitry for interfacing to the second PCI bus. The serial bus is coupled between the primary bridge and the secondary bridge.Type: GrantFiled: June 5, 1998Date of Patent: July 23, 2002Assignee: National Instruments CorporationInventors: Craig M. Conway, Kevin Schultz, B. Keith Odom, Glen Sescila, Bob Mitchell, Ross Sabolcik, Robert Hormuth
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Patent number: 6418504Abstract: A Wide Area Serial PCI system for connecting peripheral devices to a computer. The WASP system includes a host computer system connected through a serial bus to a remote device. The serial bus can range from several meters to several kilometers or more. The host computer system includes a CPU and memory, and also includes a first Peripheral Component Interconnect (PCI) bus, also referred to as the local PCI bus. A primary bridge according to the present invention is coupled to the first PCI bus. The primary bridge includes PCI interface circuitry for interfacing to the first PCI bus. The remote device is located remotely from the computer system and comprises a second or remote PCI bus and one or more peripheral devices coupled to the second PCI bus. The remote device also includes a secondary bridge coupled to the second PCI bus. The secondary bridge includes PCI interface circuitry for interfacing to the second PCI bus. The serial bus is coupled between the primary bridge and the secondary bridge.Type: GrantFiled: June 6, 2001Date of Patent: July 9, 2002Assignee: National Instruments CorporationInventors: Craig M. Conway, Kevin L. Schultz, B. Keith Odom, Glen O. Sescila, Bob Mitchell, Ross Sabolcik, Robert Hormuth
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Publication number: 20010037423Abstract: A Wide Area Serial PCI system for connecting peripheral devices to a computer. The WASP system includes a host computer system connected through a serial bus to a remote device. The serial bus can range from several meters to several kilometers or more. The host computer system includes a CPU and memory, and also includes a first Peripheral Component Interconnect (PCI) bus, also referred to as the local PCI bus. A primary bridge according to the present invention is coupled to the first PCI bus. The primary bridge includes PCI interface circuitry for interfacing to the first PCI bus. The remote device is located remotely from the computer system and comprises a second or remote PCI bus and one or more peripheral devices coupled to the second PCI bus. The remote device also includes a secondary bridge coupled to the second PCI bus. The secondary bridge includes PCI interface circuitry for interfacing to the second PCI bus. The serial bus is coupled between the primary bridge and the secondary bridge.Type: ApplicationFiled: June 6, 2001Publication date: November 1, 2001Applicant: National Instruments CorporationInventors: Craig M. Conway, Kevin L. Schultz, B. Keith Odom, Glen O. Sescila, Bob Mitchell, Ross Sabolcik, Robert Hormuth