Patents by Inventor Robert Hueston

Robert Hueston has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10846162
    Abstract: Utilities (e.g., systems, methods, etc.) that make use of a secure input/output (I/O) channel between system firmware (e.g., BIOS) and the SP to allow the BIOS to securely send data (e.g., error data) for secure consumption by the SP while preventing or limiting other sources from sending falsified data or the like the SP. The secure I/O channel includes interface hardware (e.g., Field-programmable gate array (FPGA)) that is configured to be unlocked by the BIOS using a security key received from a key generator over a separate security channel. After such data is securely sent to the interface hardware, the BIOS may then pass error interrupt(s) to the OS for performing of any necessary recovery actions. At any appropriate time, the SP may read or consume error data from the memory register of the interface hardware and perform any appropriate diagnoses and/or handling of the error data.
    Type: Grant
    Filed: November 29, 2018
    Date of Patent: November 24, 2020
    Assignee: Oracle International Corporation
    Inventors: David Rudy, Robert Hueston, Scott Cooke, Paul Mitchell
  • Publication number: 20200174875
    Abstract: Utilities (e.g., systems, methods, etc.) that make use of a secure input/output (I/O) channel between system firmware (e.g., BIOS) and the SP to allow the BIOS to securely send data (e.g., error data) for secure consumption by the SP while preventing or limiting other sources from sending falsified data or the like the SP. The secure I/O channel includes interface hardware (e.g., Field-programmable gate array (FPGA)) that is configured to be unlocked by the BIOS using a security key received from a key generator over a separate security channel. After such data is securely sent to the interface hardware, the BIOS may then pass error interrupt(s) to the OS for performing of any necessary recovery actions. At any appropriate time, the SP may read or consume error data from the memory register of the interface hardware and perform any appropriate diagnoses and/or handling of the error data.
    Type: Application
    Filed: November 29, 2018
    Publication date: June 4, 2020
    Inventors: David Rudy, Robert Hueston, Scott Cooke, Paul Mitchell