Abstract: The present disclosure relates generally to methods of manufacturing plasterboards, such as gypsum wallboards. One aspect of the disclosure is a method of manufacturing a building board that includes providing a wet building board by allowing a plaster slurry to set between opposing facings, the wet building board having a set plaster core disposed between the facings; and providing a surfactant (such as a quaternary ammonium salt surfactant) on at least one of the facings (e.g., by applying an aqueous surfactant-containing composition to the facing); then conducting the wet building board to a drying oven, for example, via one or more conveyers (e.g., rollers and/or belts and/or rails); and drying the wet building board in the drying oven to provide the building board.

Abstract: A solidified fat in the form of flakes for use in making piecrust dough has a solids content index profile within the range defined in FIG. 3. The fat comprises triglycerides of saturated and unsaturated monocarboxylic acids having from 10 to 20 carbon atoms. Such flakes of fat may be used in making a pastry composition comprising pastry making flour, premeasured amount of the flakes and a sufficient amount of a liquid fat for coating at least portions of the flakes to promote adherence of flour to the flakes in making a pastry dough.

Abstract: A method and related fixtures are disclosed which permit formation of stacks of thin circuitry-carrying layers. The layers terminate in an access plane having a two dimensional array of closely-spaced electrical leads. The method includes the steps of measuring the thickness of separate chips, selecting groups of chips having appropriate thicknesses, applying appropriate amounts of epoxy between adjacent chips, aligning the chips (and their electrical leads) in the direction parallel to their planes (i.e., the X-axis), and closing the cavity with an end wall which (a) exerts pressure on the stacked chips and epoxy in a direction perpendicular to the chip planes, and (b) establishes a fixed height of the stack in order to align the leads in the Y-axis. The final fixture provides a fixed-size cavity for confining the layers during curing of thermo-setting adhesive which has been applied between each adjacent pair of layers.

Abstract: A method and related fixtures are disclosed which permit formation of stacks of thin circuitry-carrying layers. The layers terminate in an access plane having a two dimensional array of closely-spaced electrical leads. The method includes the steps of measuring the thickness of separate chips, selecting groups of chips having appropriate thicknesses, applying appropriate amounts of epoxy between adjacent chips, aligning the chips (and their electrical leads) in the direction parallel to their planes (i.e., the X-axis), and closing the cavity with an end wall which (a) exerts pressure on the stacked chips and epoxy in a direction perpendicular to the chip planes, and (b) establishes a fixed height of the stack in order to align the leads in the Y-axis. The final fixture provides a fixed-size cavity for confining the layers during curing of thermo-setting adhesive which has been applied between each adjacent pair of layers.