Patents by Inventor Robert J. Cyran
Robert J. Cyran has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7337433Abstract: Systems and methods for improved power profiling of embedded applications are presented. These inventions provide the ability to measure the power consumption of an embedded application at the task level as the application is executing on the target hardware. Methods and apparatus are provided to permit such measurements in both real-time and non-real-time.Type: GrantFiled: December 19, 2002Date of Patent: February 26, 2008Assignee: Texas Instruments IncorporatedInventors: Robert J. Cyran, Edward A. Anderson, Scott P. Gary, Scott M. Smith, Vijaya B. P. Sarathy
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Patent number: 7290246Abstract: Systems and methods for improved power profiling of embedded applications are presented. These inventions provide the ability to measure the power consumption of an embedded application at varying levels of software granularity as the application is executing on the target hardware. Methods and apparatus are provided to permit such measurements in both real-time and non-real-time.Type: GrantFiled: December 19, 2002Date of Patent: October 30, 2007Assignee: Texas Instruments IncorporatedInventors: Robert J. Cyran, Edward A. Anderson
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Patent number: 7174468Abstract: Methods and systems are provided for developing a power management strategy for an application as the application is developed. These methods and systems broadly provide for building the application incorporating a power management module operable to provide several power management methods, capturing power consumption data of the application as it is executed on a target system, accepting modifications to the application to use one or more of the power management methods, and repeating these steps as needed. A power scaling library may also be incorporated in the application and the application may be modified to use the dynamic frequency and voltage scaling functionality provided by the power scaling library.Type: GrantFiled: June 13, 2003Date of Patent: February 6, 2007Assignee: Texas Instruments IncorporatedInventors: Scott P. Gary, Robert J. Cyran, Vijaya B. P. Sarathy, Devendra Pradhan
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Patent number: 7155617Abstract: Methods and systems are provided for dynamically managing the power consumption of a digital system. These methods and systems broadly provide for varying the frequency and voltage of one or more clocks of a digital system upon request by an entity of the digital system. An entity may request that the frequency of a clock of the processor of the digital system be changed. After the frequency is changed, the voltage point of the voltage regulator of the digital system is automatically changed to the lowest voltage point required for the new frequency if there is a single clock on the processor. If the processor is comprised of multiple processing cores with associated clocks, the frequency is changed to the lowest voltage point required by all frequencies of all clocks.Type: GrantFiled: June 13, 2003Date of Patent: December 26, 2006Assignee: Texas Instruments IncorporatedInventors: Scott P. Gary, Robert J. Cyran, Vijaya B. P. Sarathy
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Patent number: 7149636Abstract: Systems and methods for improved power profiling of embedded applications are presented. These inventions provide the ability to unobtrusively measure the power consumption of an embedded application as the application is executing on its target hardware. The unobtrusiveness is achieved by using programmable emulation circuitry in the target system processor and available device debug terminals on the test port.Type: GrantFiled: December 19, 2002Date of Patent: December 12, 2006Assignee: Texas Instruments IncorporatedInventors: Robert J. Cyran, Edward A. Anderson, Gary A. Cooper, Roger Strane, Paul Kolonay
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Patent number: 7080267Abstract: Methods and systems are provided for dynamically managing power consumption in a digital system. These methods and systems broadly provide for permitting clients executing on a digital system to register for notification of power event and to request that power events occur. Registered clients are notified when a power event is requested and the requested power event is caused to occur. Power events are selected from a group comprising setpoint change, enter deep sleep mode, enter snooze mode, and change to power supply status. There may also be user-defined custom power events. If the requested power event is a setpoint change, a check is made to verify that each of the registered clients can operate at the requested setpoint. The digital system may be comprised of processor with a single processing core with a single clock or a processor with multiple processing cores and multiple clocks.Type: GrantFiled: June 13, 2003Date of Patent: July 18, 2006Assignee: Texas Instruments IncorporatedInventors: Scott P. Gary, Robert J. Cyran, Vijaya B. P. Sarathy
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Patent number: 7028294Abstract: In one embodiment a method for handling shadow or overlay memories is described wherein a linker contains a description of the memory of a target embedded system so that each memory space is described for each state of the control devices. The linker in one embodiment contains the shadow memory configuration information so that post linker tools such as loaders and debuggers can utilize this information. The information for each configuration includes how to get the device into the state that makes each configuration visible in address space, how to get the device back into the state it was in before the state was changed and how to find out the state the device is in.Type: GrantFiled: May 8, 2002Date of Patent: April 11, 2006Assignee: Texas Instruments IncorporatedInventors: Robert J. Cyran, David A. Syiek
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Publication number: 20040025067Abstract: Methods and systems are provided for dynamically managing power consumption in a digital system. These methods and systems broadly provide for permitting clients executing on a digital system to register for notification of power event and to request that power events occur. Registered clients are notified when a power event is requested and the requested power event is caused to occur. Power events are selected from a group comprising setpoint change, enter deep sleep mode, enter snooze mode, and change to power supply status. There may also be user-defined custom power events. If the requested power event is a setpoint change, a check is made to verify that each of the registered clients can operate at the requested setpoint. The digital system may be comprised of processor with a single processing core with a single clock or a processor with multiple processing cores and multiple clocks.Type: ApplicationFiled: June 13, 2003Publication date: February 5, 2004Inventors: Scott P. Gary, Robert J. Cyran, Vijaya B.P. Sarathy
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Publication number: 20040025068Abstract: Methods and systems are provided for developing a power management strategy for an application as the application is developed. These methods and systems broadly provide for building the application incorporating a power management module operable to provide several power management methods, capturing power consumption data of the application as it is executed on a target system, accepting modifications to the application to use one or more of the power management methods, and repeating these steps as needed. A power scaling library may also be incorporated in the application and the application may be modified to use the dynamic frequency and voltage scaling functionality provided by the power scaling library.Type: ApplicationFiled: June 13, 2003Publication date: February 5, 2004Inventors: Scott P. Gary, Robert J. Cyran, Vijaya B.P. Sarathy, Devendra Pradhan
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Publication number: 20040025069Abstract: Methods and systems are provided for dynamically managing the power consumption of a digital system. These methods and systems broadly provide for varying the frequency and voltage of one or more clocks of a digital system upon request by an entity of the digital system. An entity may request that the frequency of a clock of the processor of the digital system be changed. After the frequency is changed, the voltage point of the voltage regulator of the digital system is automatically changed to the lowest voltage point required for the new frequency if there is a single clock on the processor. If the processor is comprised of multiple processing cores with associated clocks, the frequency is changed to the lowest voltage point required by all frequencies of all clocks.Type: ApplicationFiled: June 13, 2003Publication date: February 5, 2004Inventors: Scott P. Gary, Robert J. Cyran, Vijaya B.P. Sarathy
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Publication number: 20030191986Abstract: Systems and methods for improved power profiling of embedded applications are presented. These inventions provide the ability to unobtrusively measure the power consumption of an embedded application as the application is executing on its target hardware. The unobtrusiveness is achieved by using programmable emulation circuitry in the target system processor and available device debug terminals on the test port.Type: ApplicationFiled: December 19, 2002Publication date: October 9, 2003Inventors: Robert J. Cyran, Edward A. Anderson, Gary A. Cooper, Roger Strane, Paul Kolonay
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Publication number: 20030191976Abstract: Systems and methods for improved power profiling of embedded applications are presented. These inventions provide the ability to measure the power consumption of an embedded application at varying levels of software granularity as the application is executing on the target hardware. Methods and apparatus are provided to permit such measurements in both real-time and non-real-time.Type: ApplicationFiled: December 19, 2002Publication date: October 9, 2003Inventors: Robert J. Cyran, Edward A. Anderson
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Publication number: 20030191791Abstract: Systems and methods for improved power profiling of embedded applications are presented. These inventions provide the ability to measure the power consumption of an embedded application at the task level as the application is executing on the target hardware. Methods and apparatus are provided to permit such measurements in both real-time and non-real-time.Type: ApplicationFiled: December 19, 2002Publication date: October 9, 2003Inventors: Robert J. Cyran, Edward A. Anderson, Scott P. Gary, Scott M. Smith, Vijaya B.P. Sarathy
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Publication number: 20020188929Abstract: In one embodiment a method for handling shadow or overlay memories is described wherein a linker contains a description of the memory of a target embedded system so that each memory space is described for each state of the control devices. The linker in one embodiment contains the shadow memory configuration information so that post linker tools such as loaders and debuggers can utilize this information. The information for each configuration includes how to get the device into the state that makes each configuration visible in address space, how to get the device back into the state it was in before the state was changed and how to find out the state the device is in.Type: ApplicationFiled: May 8, 2002Publication date: December 12, 2002Inventors: Robert J. Cyran, David A. Syiek
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Patent number: 6412107Abstract: The present invention is a code preparation system (12) which accepts input code (11) in intermediate code format, our source code format which is first translated into intermediate format, analyzes the intermediate code, then provides optimization information, hints, and/or directions (collectively referred to as “optimization information”) for optimizing execution of the intermediate code by a code interpretive runtime environment, such as a Java Virtual Machine. The code interpretive runtime environment is operable to selectively implement the optimization information received from the code preparation system (12). The optimization information is provided to the code interpretive runtime environment in the form of additional attributes added to a class file (14) generated by the code preparation system (12).Type: GrantFiled: February 24, 1999Date of Patent: June 25, 2002Assignee: Texas Instruments IncorporatedInventors: Robert J. Cyran, Paul J. Knueven, Jonathan H. Shiell