Patents by Inventor Robert J Distinti

Robert J Distinti has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6636169
    Abstract: Disclosed is an integrated circuit comprising a substrate having a plurality of digital signal processors, including at least one analog circuit block, and means on said substrate for programmably interconnecting said processors and said at least one analog circuit block together. Also disclosed is a programming system comprising means for converting a programmable analog array specification into one or more programs executable by one or more digital signal processors so as to perform the identical or substantially identical function or functions as the programmed analog array.
    Type: Grant
    Filed: November 6, 2000
    Date of Patent: October 21, 2003
    Inventors: Robert J Distinti, Harry F Smith
  • Patent number: 6144327
    Abstract: Disclosed is an integrated circuit comprising a substrate having a plurality of digital signal processors, including at least one analog circuit block, and means on said substrate for programmably interconnecting said processors and said at least one analog circuit block together. Also disclosed is a programming system comprising means for converting a programmable analog array specification into one or more programs executable by one or more digital signal processors so as to perform the identical or substantially identical function or functions as the programmed analog array.
    Type: Grant
    Filed: August 12, 1997
    Date of Patent: November 7, 2000
    Assignee: Intellectual Property Development Associates of Connecticut, Inc.
    Inventors: Robert J Distinti, Harry F Smith
  • Patent number: 5748133
    Abstract: An Operational Analog to Digital (SYMAD) Convertor cell for converting an analog signal into a discrete binary code. An analog signal is processed by sample and hold circuitry and then compared to a reference voltage by a comparator. The comparator output is the converted digital output. This output is coupled back to the control input of an analog switch which selects either the reference voltage or a predetermined potential, typically zero volts, to couple to an inverting input of an operational amplifier. The analog signal input is also coupled to the non-inverting input of the operational amplifier. The operational amplifier is configured as a differential amplifier with a gain of two. If the digital output of the comparator is a logic 1, then the operational amplifier output is two times the difference between the analog signal and the reference voltage. If the digital output of the comparator is a logic 0, then the output of the operational amplifier is two times the analog signal.
    Type: Grant
    Filed: June 12, 1996
    Date of Patent: May 5, 1998
    Assignee: Intellectual Property Development Associates of Connecticut, Incorporated
    Inventor: Robert J. Distinti
  • Patent number: 5608402
    Abstract: An Operational Analog to Digital (SYMAD) Convertor cell for converting an analog signal into a discrete binary code. An analog signal is processed by sample and hold circuitry and then compared to a reference voltage by a comparator. The comparator output is the converted digital output. This output is coupled back to the control input of an analog switch which selects either the reference voltage or a predetermined potential, typically zero volts, to couple to an inverting input of an operational amplifier. The analog signal input is also coupled to the non-inverting input of the operational amplifier. The operational amplifier is configured as a differential amplifier with a gain of two. If the digital output of the comparator is a logic 1, then the operational amplifier output is two times the difference between the analog signal and the reference voltage. If the digital output of the comparator is a logic 0, then the output of the operational amplifier is two times the analog signal.
    Type: Grant
    Filed: March 24, 1995
    Date of Patent: March 4, 1997
    Assignee: Intellectual Property Development Associates of Connecticut, Inc.
    Inventor: Robert J. Distinti
  • Patent number: 5519396
    Abstract: An n-bit analog processing circuit constructed with network swappers has n stages and an input port for inputting an analog signal to be processed. Each of the n stages includes first and second reference input ports, at least one swappable network having first and second terminals, and a switching element that is responsive to a digital input signal for varying a connectivity of the first and second terminals with respect to the first and second reference input ports. Each of the n networks has a primary electrical characteristic that is binarily weighted with respect to others of the networks. The primary electrical characteristic may be resistance, capacitance, capacitive reactance, inductance, inductive reactance, voltage potential, gain, transconductance, superconductance, time delay, permeability, electrical or optical conductor length, and/or winding turns.
    Type: Grant
    Filed: December 12, 1994
    Date of Patent: May 21, 1996
    Assignee: Intellectual Property Development Associates of Connecticut, Inc.
    Inventor: Robert J. Distinti
  • Patent number: 5404143
    Abstract: An n-bit analog processing circuit constructed with network swappers has n stages and an input port for inputting an analog signal to be processed. Each of the n stages includes first and second reference input ports, at least one swappable network having first and second terminals, and a switching element that is responsive to a digital input signal for varying a connectivity of the first and second terminals with respect to the first and second reference input ports. Each of the n networks has a primary electrical characteristic that is binarily weighted with respect to others of the networks. The primary electrical characteristic may be resistance, capacitance, capacitive reactance, inductance, inductive reactance, voltage potential, gain, transconductance, superconductance, time delay, permeability, electrical or optical conductor length, and/or winding turns.
    Type: Grant
    Filed: April 8, 1993
    Date of Patent: April 4, 1995
    Assignee: Intellectual Property Development Associates of Connecticut, Inc.
    Inventor: Robert J. Distinti
  • Patent number: 5402125
    Abstract: An Operational Analog to Digital (SYMAD) Convertor cell for converting an analog signal into a discrete binary code. An analog signal is processed by sample and hold circuitry and then compared to a reference voltage by a comparator. The comparator output is the converted digital output. This output is coupled back to the control input of an analog switch which selects either the reference voltage or a predetermined potential, typically zero volts, to couple to an inverting input of an operational amplifier. The analog signal input is also coupled to the non-inverting input of the operational amplifier. The operational amplifier is configured as a differential amplifier with a gain of two. If the digital output of the comparator is a logic 1, then the operational amplifier output is two times the difference between the analog signal and the reference voltage. If the digital output of the comparator is a logic 0, then the output of the operational amplifier is two times the analog signal.
    Type: Grant
    Filed: May 13, 1992
    Date of Patent: March 28, 1995
    Assignee: Intellectual Property Development Associates of Connecticut, Incorporated
    Inventor: Robert J. Distinti
  • Patent number: 5202687
    Abstract: An Operational Analog to Digital (SYMAD) Convertor cell for converting an analog signal into a discrete binary code. An analog signal is processed by sample and hold circuitry and then compared to a reference voltage by a comparator. The comparator output is the converted digital output. This output is coupled back to the control input of an analog switch which selects either the reference voltage or a predetermined potential, typically zero volts, to couple to an inverting input of an operational amplifier. The analog signal input is also coupled to the non-inverting input of the operational amplifier. The operational amplifier is configured as a differential amplifier with a gain of two. If the digital output of the comparator is a logic 1, then the operational amplifier output is two times the difference between the analog signal and the reference voltage. If the digital output of the comparator is a logic 0, then the output of the operational amplifier is two times the analog signal.
    Type: Grant
    Filed: June 12, 1991
    Date of Patent: April 13, 1993
    Assignee: Intellectual Property Development Associates of Connecticut
    Inventor: Robert J. Distinti