Patents by Inventor Robert J. Harendza

Robert J. Harendza has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method of making circuitized substrate with selected conductors having solder thereon
    Patent number: 7910156
    Abstract: A method of making a circuitized substrate in which conductors are formed in such a manner that selected ones of the conductors include solder while others do not and are thus adapted for receiving a different form of connection (e.g., wire-bond) than the solder covered conductors. In one embodiment, the solder may be applied in molten form by immersing the substrate within a bath of the solder while in another the solder may be deposited using a screening procedure.
    Type: Grant
    Filed: March 30, 2007
    Date of Patent: March 22, 2011
    Assignee: Endicott Interconnect Technologies, Inc.
    Inventors: Norman A. Card, Robert J. Harendza, John J. Konrad, Tonya L. Mosher, Susan Pitely, Jose A. Rios
  • Method of providing a printed circuit board with an edge connection portion and/or a plurality of cavities therein
    Patent number: 7596863
    Abstract: A method of making a printed circuit board in which at least three substrates are aligned and bonded together (e.g., using lamination). Two of the substrates have openings formed therein, with each opening including a cover member located therein. During lamination, the cover members for a seal and prevent dielectric material (e.g., resin) liquefied during the lamination from contacting the conductive layers on the opposed surfaces of the inner (first) substrate. A PCB is thus formed with either a projecting edge portion or a plurality of cavities therein such that electrical connection may be made to the PCB using an edge connector or the like.
    Type: Grant
    Filed: January 12, 2007
    Date of Patent: October 6, 2009
    Assignee: Endicott Interconnect Technologies, Inc.
    Inventors: Ashwinkumar C. Bhatt, Robert J. Harendza, Robert M. Japp
  • Method of making circuitized substrate with selected conductors having solder thereon
    Publication number: 20080241359
    Abstract: A method of making a circuitized substrate in which conductors are formed in such a manner that selected ones of the conductors include solder while others do not and are thus adapted for receiving a different form of connection (e.g., wire-bond) than the solder covered conductors. In one embodiment, the solder may be applied in molten form by immersing the substrate within a bath of the solder while in another the solder may be deposited using a screening procedure.
    Type: Application
    Filed: March 30, 2007
    Publication date: October 2, 2008
    Applicant: Endicott Interconnect Technologies, Inc.
    Inventors: Norman A. Card, Robert J. Harendza, John J. Konrad, Tonya Mosher, Susan Pitely, Jose A. Rios
  • Method of providing a printed circuit board with an edge connection portion and/or a plurality of cavities therein
    Publication number: 20080168651
    Abstract: A method of making a printed circuit board in which at least three substrates are aligned and bonded together (e.g., using lamination). Two of the substrates have openings formed therein, with each opening including a cover member located therein. During lamination, the cover members for a seal and prevent dielectric material (e.g., resin) liquefied during the lamination from contacting the conductive layers on the opposed surfaces of the inner (first) substrate. A PCB is thus formed with either a projecting edge portion or a plurality of cavities therein such that electrical connection may be made to the PCB using an edge connector or the like.
    Type: Application
    Filed: January 12, 2007
    Publication date: July 17, 2008
    Applicant: Endicott Interconnect Technologies, Inc.
    Inventors: Ashwinkumar C. Bhatt, Robert J. Harendza, Robert M. Japp