Abstract: Reporting electrical current to a processor. At least some of the illustrative embodiments are methods including providing operational power to a processor at a voltage indicated by the processor of a computer system, measuring electrical current actually drawn by the processor, and reporting to the processor a value of electrical current drawn by the processor. The value of electrical current reported different than the electrical current actually drawn by more than a measurement error of measuring the electrical current actually drawn.

Abstract: Multi-processor computer systems and methods are provided. A multi-processor computer system can include a plurality of communicatively coupled processors (1101-N), each coupled to a common motherboard (120) and each associated with a memory (1401-N). The system can include a boot code (130) executable from at least one of a standard mode and an independent mode. The plurality of communicatively coupled processors can execute one instance of the boot code in standard mode and at least a portion of the plurality of communicatively coupled processors can execute one instance of the boot code in independent mode.

Abstract: Peripheral Component Interconnect Express (“PCIe”) Port bifurcation systems and methods are provided. An illustrative PCIe port bifurcation card can include: a PCIe interface and a plurality of PCIe devices, each independently coupled to the interface via an unswitched connection. The card can further include a read only memory (ROM) coupled to the interface, the ROM can include bifurcation data. A clocking signal replicator can be coupled to the interface to: replicate a reference clock signal received via the interface and provide the replicated reference dock signal to each of the plurality of PCIe devices.

Abstract: Reporting electrical current to a processor. At least some of the illustrative embodiments are methods including providing operational power to a processor at a voltage indicated by the processor of a computer system, measuring electrical current actually drawn by the processor, and reporting to the processor a value of electrical current drawn by the processor. The value of electrical current reported different than the electrical current actually drawn by more than a measurement error of measuring the electrical current actually drawn.

Abstract: The present invention is generally directed to a system and method for fetching data from system memory to a device in communication with the system over a PCI bus, via an I/O cache. Broadly, the present invention may be viewed as a novel way to communicate certain fetching hints; namely, hints that specify certain qualities about the data that is to be fetched from the system memory. In operation, the I/O cache may use such hints to more effectively manage the data that passes through it. As simply one example, if, based upon the hints, the controller for the I/O cache knew (or assumed) that the data being fetched was ATM data, then it would also know (based upon the nature of ATM data) that precisely a forty-eight byte data payload was to be sent to the requesting device, and the I/O cache could pre-fetch precisely this amount of data (typically one or two cache lines).

Abstract: The present invention is generally directed to a system and method for fetching data from system memory to a device in communication with the system over a PCI bus, via an I/O cache. Broadly, the present invention may be viewed as a novel way to communicate certain fetching hints; namely, hints that specify certain qualities about the data that is to be fetched from the system memory. In operation, the I/O cache may use such hints to more effectively manage the data that passes through it. As simply one example, if, based upon the hints, the controller for the I/O cache knew (or assumed) that the data being fetched was ATM data, then it would also know (based upon the nature of ATM data) that precisely a forty-eight byte data payload was to be sent to the requesting device, and the I/O cache could pre-fetch precisely this amount of data (typically one or two cache lines).

Abstract: The present invention is generally directed to a system and method for fetching data from system memory to a device in communication with the system over a PCI bus, via an I/O cache. Broadly, the present invention may be viewed as a novel way to communicate certain fetching hints; namely, hints that specify certain qualities about the data that is to be fetched from the system memory. In operation, the I/O cache may use such hints to more effectively manage the data that passes through it. As simply one example, if, based upon the hints, the controller for the I/O cache knew (or assumed) that the data being fetched was ATM data, then it would also know (based upon the nature of ATM data) that precisely a forty-eight byte data payload was to be sent to the requesting device, and the I/O cache could pre-fetch precisely this amount of data (typically one or two cache lines).

Abstract: A method for activating electrochemical cells including the steps of sealing the electrochemical cells in a container with an activating electrolyte solvent and salt, treatment steps, such as the application of compression and decompression cycles to the container, for providing good distribution of the electrolyte within the electrochemical cells.

Abstract: The present invention is generally directed to a system and method for providing improved memory management in an asynchronous I/O cache memory. The method includes the steps of identifying a request for data from the system memory by a requesting device that is in communication with the system memory via an I/O bus. Then the method controls the communication of data from the system memory into the cache memory. The method further includes the step of communicating the data from the cache memory to the requesting device, and immediately after communicating the data to the requesting device, the method discards the data from the cache memory. In accordance with the preferred embodiment, the method flushes data from the I/O cache line at a time. Therefore, when a given cache line of data is flushed from the cache after the last data byte of the cache line is communicated out to the requesting device.

Abstract: The present invention is generally directed to a system and method for fetching data from a system memory to an ATM card. The method includes the steps of receiving a request (via a PCI bus) to fetch data from memory, and identifying the request as an ATM request. The method then determines, based on the start address, the number of cache lines that will be implicated by the fetch. Then, the method automatically fetches the appropriate number of cache lines into the cache, and then passes the data to the ATM card, via the PCI bus. In accordance with another aspect of the present invention, a system is provided for fetching data from memory for an ATM card. Broadly, the system includes a system memory for data storage and a cache memory for providing high-speed (retrieval) temporary storage of data, the cache memory being disposed in communication with the system memory via a high-speed system bus. The system further includes a PCI bus in communication with the cache memory via an input/output (I/O) bus.

Abstract: A low skew interface system for enabling an ASIC chip's receivers to latch information from one or more buses. The interface comprises a driver circuit connected to an internal clock of the chip for generating another clock signal with phase different from the phase of the internal clock. A delay element is located off the chip and connected to the driver circuit for delaying the clock signal, thereby generating a latch clock signal. The latch clock signal is sent back on-chip to enable the receivers to transfer information from one of the buses to the chip.

Abstract: A reserve battery having a plurality of galvanic cells and a series of ports through which electrolyte can flow into the cells. A spring activated valve opens the ports during periods of angular acceleration of the battery and closes the ports when there is no acceleration.

Abstract: LiAsF.sub.6 /dimethyl sulfite electrolyte solutions of improved storage sility are obtained by incorporating metallic lithium therein.