Abstract: The present disclosure provides for a modular design and build architecture, comprising: one or more integrated system module (ISMs) that are configured to be shipped and assembled on-site to construct an operational infrastructure for one or more application environments, wherein each of the ISMs comprises two or more different functional components that are integrated onto and/or supported by a common structural floor.

Abstract: Methods and systems are provided for animating a cursor image. In an exemplary embodiment, image data for the cursor image maintained by a first memory is provided for display on a display device, and that image data is written to a second memory while being provided from the first memory for display. Prior to writing new image data for a portion of the cursor image to the first memory, the image data maintained by the second memory is provided for display on the display device and the new image data is written to the first memory while the image data maintained by the second memory is being provided to the display.

Abstract: A method of ensuring high integrity of a processor is provided. The method includes executing sets of sequential instructions, each execution being based on a unique initial value, generating a computed final value responsive to each execution of a set of sequential instructions, and sending computed values to a monitoring portion of a high integrity processor monitor system responsive to the generating for each execution of the set of sequential instructions. The execution of the sets of sequential instructions tests pertinent addressing modes, operand sizes, and instruction side-effects for each instruction tested in a monitored central processing unit.

Abstract: A system for detecting cursor interference includes a graphics engine configured to generate graphics information; a first evaluation unit coupled to the graphics engine and configured to evaluate the graphics information; a cursor generation unit coupled to the graphics engine and configured to generate cursor information, the cursor generator further configured to merge the cursor information and the graphics information into merged information; a second evaluation unit coupled to the cursor generation unit and configured to evaluate the merged information; and a display device coupled to the cursor generation unit and configured to display the merged information based on the evaluations of the graphics information and the merged information.

Abstract: A method of ensuring high integrity of a processor is provided. The method includes executing sets of sequential instructions, each execution being based on a unique initial value, generating a computed final value responsive to each execution of a set of sequential instructions, and sending computed values to a monitoring portion of a high integrity processor monitor system responsive to the generating for each execution of the set of sequential instructions. The execution of the sets of sequential instructions tests pertinent addressing modes, operand sizes, and instruction side-effects for each instruction tested in a monitored central processing unit.

Abstract: A system for detecting cursor interference includes a graphics engine configured to generate graphics information; a first evaluation unit coupled to the graphics engine and configured to evaluate the graphics information; a cursor generation unit coupled to the graphics engine and configured to generate cursor information, the cursor generator further configured to merge the cursor information and the graphics information into merged information; a second evaluation unit coupled to the cursor generation unit and configured to evaluate the merged information; and a display device coupled to the cursor generation unit and configured to display the merged information based on the evaluations of the graphics information and the merged information.

Abstract: In one embodiment of the present invention, a system for displaying images in at least one display window on a display unit includes a display processor configured to generate graphics commands from a received input. A graphics processing unit is coupled to the display processor and includes rendering engine configured to generate graphic data from the graphics commands, an internal memory coupled to the rendering engine, and a general purpose I/O coupled to the rendering engine and configured to transmit messages from the graphics processing unit. A graphics logic device is coupled to the graphics processing unit. The graphics logic device is configured to initiate a transfer of graphic data for an update of a display window from the internal memory to the display unit upon receipt of a message indicative of an available update to the display window.

Abstract: An apparatus includes a rendering engine to render a foreground of an image. The apparatus also includes a logic, separate from the rendering engine, to merge at least one background color with the foreground of the image.

Abstract: In one embodiment of the present invention, a system for displaying images in at least one display window on a display unit includes a display processor configured to generate graphics commands from a received input. A graphics processing unit is coupled to the display processor and includes rendering engine configured to generate graphic data from the graphics commands, an internal memory coupled to the rendering engine, and a general purpose I/O coupled to the rendering engine and configured to transmit messages from the graphics processing unit. A graphics logic device is coupled to the graphics processing unit. The graphics logic device is configured to initiate a transfer of graphic data for an update of a display window from the internal memory to the display unit upon receipt of a message indicative of an available update to the display window.