Patents by Inventor Robert J. Wallace

Robert J. Wallace has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4947235
    Abstract: Propagation of electromagnetic interference waves is eliminated or substantially reduced by providing an electromagnetic interference shield suitable for shielding electromagnetic interference or radio frequency interference which are generated by offending components on a monolithic integrated circuit chip. The shield is disposed over the offending components of the integrated circuit and is sufficiently large to eliminate or substantially reduce the propagation of any offending interference waves. Alternatively, the shield may be disposed over a non-offending component to prevent radiated electromagnetic interference from entering the non-offending component. The shield is electrically conductive and maintained at a predetermined, primarily constant, electrical potential with respect to the underlying integrated circuit chip.
    Type: Grant
    Filed: February 21, 1989
    Date of Patent: August 7, 1990
    Assignee: Delco Electronics Corporation
    Inventors: Norman J. Roth, Robert J. Wallace, Domenica N. Hartman
  • Patent number: 4885618
    Abstract: A metal-oxide semiconductor field-effect transistor (MOSFET) device having an insulating barrier buried in the substrate between the device's source and drain regions. The insulating barrier can be in contact with the source region of the MOS device. The barrier is implanted in the substrate through a masked implantation of high doses of oxygen, followed by an annealing of the oxygen to form the silicon dioxide insulating barrier. The insulating barrier can be either discrete or part of a continuous sheet of silicon dioxide placed below the silicon substrate. Placing the insulating barrier between the source and drain regions substantially diminishes the punch-through effect of subsurface currents, thereby increasing the punch-through voltage. This permits the construction of MOS devices having shorter channel lengths with resulting higher circuit density and greater speed.
    Type: Grant
    Filed: August 25, 1987
    Date of Patent: December 5, 1989
    Assignee: General Motors Corporation
    Inventors: Peter J. Schubert, Robert J. Wallace