Abstract: A differential input stage for an operational amplifier includes a transistor pair differentially connected and supplied with tail current through a series resistor. The tail current is supplied by a pair of current amplifiers having their outputs coupled to the tail current resistor. The current amplifier inputs are coupled to the bases of the input transistor pair so that they are differentially driven. If the tail current resistor is properly selected the differential output current is a linear function of the differential input voltage. A clamp is provided for the differential input at some relatively large input signal voltage.

Abstract: A thermal shutdown circuit for use with a high power transistor which incorporates a sense emitter. A differential amplifier is driven from the transistor base and the sense emitter and has an output that is coupled to the power transistor base. When the sense emitter potential exceeds the base potential, the amplifier output will pull the base down so as to limit the current in the power transistor. For a silicon transistor, the circuit will act to limit the hottest portion of the sense emitter to a maximum of about 250.degree. C. When there are no hot spots and the sense emitter is heated uniformly, heating of the transistor will be limited to about 200.degree. C.

Abstract: A power transistor structure that is well suited to both switching and lower-voltage linear applications is displayed. A key element of the design is thin-film ballast resistors that act as a second level of interconnect. They can be connected to or insulated from the overlying metal and the underlying silicon, except where contact holes are provided. Thus, an intricate structure having small emitters with individual ballast resistors can be fabricated below the wide metal busses required to carry current out of a large power array. The result is a ballasting scheme that can be optimized for a wide range of linear and switching applications while making efficient use of metallization which often limits the size of power arrays. This is especially important in the design of IC power transistors where both the emitter and collector current must be conducted out of the array with surface metallization.

Abstract: A class B IC transistor output stage, using a pair of NPN transistors, is described. A quasi-complementary transistor is employed to establish the stage quiescent bias. An NPN bias transistor is coupled to the output sink transistor and is driven from the emitter of the input driver transistor. Therefore, the input signal is coupled to apply the signal directly to the base of the sink transistor as well as to the source transistor. This feedforward arrangement by-passes the PNP transistor when a signal is applied so that the asymmetrical performance of the PNP transistor does not adversely affect the signal performance.

Abstract: A circuit arrangement including first and second output transistors, a sensor diode means, and a circuit means. The first output transistor drives the load positive. The second output transistor drives the load negative. The sensor diode means senses the current in the collector of the first output transistor. The circuit means is connected in circuit with the sensor diode means and the base of the second output transistor for establishing the quiescent current level of the first output transistor. An output of the circuit means is applied at the base of the second output transistor for preventing the output of the first output transistor from falling substantially below its quiescent current level. The output of the circuit means is dependent upon the current sensed by the sensor diode means.

Abstract: A power transistor design that eliminates thermally initiated secondary breakdown in fast, double-diffused transistors is described. The power dissipation capability is made independent of collector voltage, avoiding safe area restrictions below 0.9 BV.sub.CBO.

Abstract: Bandgap voltage reference circuits have been developed for integrated circuit applications. Typically, a negative temperature coefficient first voltage is developed related to the base to emitter potential of a transistor. A positive temperature coefficient second voltage related to the difference in base to emitter potential between two transistors operating at different current densities is developed and combined with the first voltage so as to produce a temperature compensated reference voltage. Such first order compensation leaves second order effects uncompensated. In the invention, a third voltage having a suitable temperature coefficient is combined with the first and second voltages so that the resultant reference voltage is compensated to a second order.

Abstract: An integrated circuit gain block is obtained by cascading a common collector stage with a complementary common emitter stage. The current density of the common emitter transistor is made sufficiently greater than that of the common collector transistor so that the common emitter V.sub.BE lowest worst case value is higher than the common collector V.sub.BE highest worst case value. This makes the circuit manufacturable in integrated circuit form and permits the circuit to operate from a single power supply potential that can be as low as the series combination of one V.sub.BE added to one transistor collector to emitter saturation voltage. The circuit has a high current gain and is amenable to incorporation into current boosted class B amplifier output stages.