Patents by Inventor Robert Japp

Robert Japp has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8445094
    Abstract: A circuitized substrate which includes at least one circuit layer and at least one substantially solid dielectric layer comprised of a dielectric composition which includes a cured resin material and a predetermined percentage by weight of particulate fillers, but not including continuous or semi-continuous fibers as part thereof.
    Type: Grant
    Filed: September 6, 2007
    Date of Patent: May 21, 2013
    Assignee: Endicott Interconnect Technologies, Inc.
    Inventors: Robert Japp, Kostas Papathomas
  • Patent number: 7508076
    Abstract: An information handling system which includes as part thereof a circuitized substrate comprising a first layer comprised of a dielectric material including a resin material including a predetermined quantity of particles therein and not including continuous fibers, semi-continuous fibers or the like as part thereof, and at least one circuitized layer positioned on the dielectric first layer.
    Type: Grant
    Filed: February 10, 2006
    Date of Patent: March 24, 2009
    Assignee: Endicott Interconnect Technologies, Inc.
    Inventors: Robert Japp, Voya Markovich, Cheryl Palomaki, Kostas Papathomas, David L. Thomas
  • Patent number: 7416996
    Abstract: A method of making a circuitized substrate comprising a first layer comprised of a dielectric material including a resin material including a predetermined quantity of particles therein and not including continuous fibers, semi-continuous fibers or the like as part thereof, and at least one circuitized layer positioned on the dielectric first layer.
    Type: Grant
    Filed: February 9, 2006
    Date of Patent: August 26, 2008
    Assignee: Endicott Interconnect Technologies, Inc.
    Inventors: Robert Japp, Voya Markovich, Cheryl Palomaki, Kostas Papathomas, David L. Thomas
  • Publication number: 20080032155
    Abstract: A structure. The structure includes a stack of two or more sheets. Successive sheets in each pair of successive sheets of the stack are adhesively coupled to each other by an adhesive layer consisting of a removable adhesive that is removable if heated to an elevated temperature at which the removable adhesive melts. The removable adhesive is also disposed on top and bottom surfaces of the stack. The removable adhesive consists of a liquid while adhesively coupling the successive sheets to each other. A first surface of a first layer coupled with the removable adhesive to a first surface of the stack. A first surface of a second layer is coupled with the removable adhesive to a second surface of the stack. The first and second layers are adapted to prevent burr formation in a hole subsequently drilled through the stack.
    Type: Application
    Filed: October 3, 2007
    Publication date: February 7, 2008
    Inventors: Robert Japp, Gregory Kevern, Francis Poch
  • Publication number: 20080003407
    Abstract: A circuitized substrate which includes at least one circuit layer and at least one substantially solid dielectric layer comprised of a dielectric composition which includes a cured resin material and a predetermined percentage by weight of particulate fillers, but not including continuous or semi-continuous fibers as part thereof.
    Type: Application
    Filed: September 6, 2007
    Publication date: January 3, 2008
    Inventors: Robert Japp, Kostas Papathomas
  • Patent number: 7270845
    Abstract: A dielectric composition which forms a dielectric layer usable in circuitized substrates such as PCBs, chip carriers and the like. As such a layer, it includes a cured resin material and a predetermined percentage by weight of particulate fillers, thus not including continuous fibers, semi-continuous fibers or the like as part thereof.
    Type: Grant
    Filed: March 31, 2004
    Date of Patent: September 18, 2007
    Assignee: Endicott Interconnect Technologies, Inc.
    Inventors: Robert Japp, Kostas Papathomas
  • Patent number: 7259333
    Abstract: A laminate circuit structure assembly is provided that comprises at least two modularized circuitized voltage plane subassemblies; optionally an interposer located between each of the subassemblies, and wherein the subassemblies and interposer, if present, are bonded together with a cured dielectric coating. The interposer comprises dielectric layers disposed about an internal electrically conductive layer.
    Type: Grant
    Filed: October 25, 2004
    Date of Patent: August 21, 2007
    Assignee: International Business Machines Corporation
    Inventors: Robert Japp, Gregory Kevern, William Rudik
  • Publication number: 20070182016
    Abstract: A method of making a circuitized substrate including a composite layer including a first dielectric sub-layer including a plurality of fibers having a low coefficient of thermal expansion and a second dielectric sub-layer of a low moisture absorptivity resin, the second dielectric sub-layer not including continuous or semi-continuous fibers or the like as part thereof. The substrate further includes at least one electrically conductive layer as part thereof.
    Type: Application
    Filed: April 5, 2007
    Publication date: August 9, 2007
    Applicant: Endicott Interconnect Technologies, Inc.
    Inventors: Robert Japp, Irving Memis, Kostas Papathomas
  • Publication number: 20070166944
    Abstract: A method of making a circuitized substrate and an electrical assembly utilizing same in which the substrate is comprised of at least two sub-composites in which the dielectric material of at least one of these sub-composites is heated during bonding (e.g., lamination) to the other sufficiently to cause the dielectric material to flow into and substantially fill openings in a conductive layer for the bonded structure. Conductive thru-holes are formed within the bonded structure to couple selected ones of the structure's conductive layers. Formation of an electrical assembly is possible by positioning one or more electrical components (e.g., semiconductor chips or chip carriers) on the final structure and electrically coupling these to the structure's external circuitry.
    Type: Application
    Filed: January 4, 2006
    Publication date: July 19, 2007
    Applicant: Endicott Interconnect Technologies, Inc.
    Inventors: Robert Japp, John Lauffer, Voya Markovich, William Wilson
  • Publication number: 20060180936
    Abstract: A dielectric composition for forming a dielectric layer usable in circuitized substrates such as PCBs, chip carriers and the like, the composition including at least two fluoropolymers and two inorganic fillers. A circuitized substrate including at least one such dielectric layer and at least one conductive layer thereon is also provided.
    Type: Application
    Filed: March 28, 2006
    Publication date: August 17, 2006
    Applicant: Endicott Interconnect Technologies, Inc.
    Inventors: Robert Japp, Voya Markovich, Kosta Papathomas
  • Patent number: 7078816
    Abstract: A circuitized substrate comprising a first layer comprised of a dielectric material including a resin material including a predetermined quantity of particles therein and not including continuous fibers, semi-continuous fibers or the like as part thereof, and at least one circuitized layer positioned on the dielectric first layer. An electrical assembly and a method of making the substrate is also provided, as is a circuitized structure including the circuitized substrate in combination with other circuitized substrates having lesser dense thru-hole patterns. An information handling system incorporating the circuitized substrate of the invention as part thereof is also provided.
    Type: Grant
    Filed: March 31, 2004
    Date of Patent: July 18, 2006
    Assignee: Endicott Interconnect Technologies, Inc.
    Inventors: Robert Japp, Voya Markovich, Cheryl Palomaki, Kostas Papathomas, David L. Thomas
  • Publication number: 20060131755
    Abstract: A method of making a circuitized substrate comprising a first layer comprised of a dielectric material including a resin material including a predetermined quantity of particles therein and not including continuous fibers, semi-continuous fibers or the like as part thereof, and at least one circuitized layer positioned on the dielectric first layer.
    Type: Application
    Filed: February 9, 2006
    Publication date: June 22, 2006
    Applicant: Endicott Interconnect Technologies, Inc.
    Inventors: Robert Japp, Voya Markovich, Cheryl Palomaki, Kostas Papathomas, David Thomas
  • Publication number: 20060125103
    Abstract: An information handling system which includes as part thereof a circuitized substrate comprising a first layer comprised of a dielectric material including a resin material including a predetermined quantity of particles therein and not including continuous fibers, semi-continuous fibers or the like as part thereof, and at least one circuitized layer positioned on the dielectric first layer.
    Type: Application
    Filed: February 10, 2006
    Publication date: June 15, 2006
    Applicant: Endicott Interconnect Technologies, Inc.
    Inventors: Robert Japp, Voya Markovich, Cheryl Palomaki, Kostas Papathomas, David Thomas
  • Publication number: 20060054870
    Abstract: A dielectric composition which is adapted for combining with a supporting material (e.g., fiber-glass cloth) to form a dielectric layer usable in circuitized substrates such as PCBs, chip carriers and the like. As such a layer, it includes a resin, a predetermined percentage by weight of a filler, and, significantly, only a minor amount of bromine. A circuitized substrate comprised of one or more of these dielectric layers and one or more conductive layers is also provided.
    Type: Application
    Filed: November 3, 2005
    Publication date: March 16, 2006
    Applicant: Endicott Interconnect Technologies, Inc.
    Inventors: Robert Japp, Voya Markovich, Kostas Papathomas
  • Publication number: 20050224767
    Abstract: A dielectric composition which forms a dielectric layer usable in circuitized substrates such as PCBs, chip carriers and the like. As such a layer, it includes a cured resin material and a predetermined percentage by weight of particulate fillers, thus not including continuous fibers, semi-continuous fibers or the like as part thereof.
    Type: Application
    Filed: March 31, 2004
    Publication date: October 13, 2005
    Applicant: Endicott Interconnect Technologies, Inc.
    Inventors: Robert Japp, Kostas Papathomas
  • Publication number: 20050224985
    Abstract: A circuitized substrate comprising a first layer comprised of a dielectric material including a resin material including a predetermined quantity of particles therein and not including continuous fibers, semi-continuous fibers or the like as part thereof, and at least one circuitized layer positioned on the dielectric first layer. An electrical assembly and a method of making the substrate is also provided, as is a circuitized structure including the circuitized substrate in combination with other circuitized substrates having lesser dense thru-hole patterns. An information handling system incorporating the circuitized substrate of the invention as part thereof is also provided.
    Type: Application
    Filed: March 31, 2004
    Publication date: October 13, 2005
    Applicant: Endicott Interconnect Technologies, Inc.
    Inventors: Robert Japp, Voya Markovich, Cheryl Palomaki, Kostas Papathomas, David Thomas
  • Publication number: 20050218524
    Abstract: A circuitized substrate including a composite layer including a first dielectric sub-layer including a plurality of fibers having a low coefficient of thermal expansion and a second dielectric sub-layer of a low moisture absorptivity resin, the second dielectric sub-layer not including continuous or semi-continuous fibers or the like as part thereof. The substrate further includes at least one electrically conductive layer as part thereof. An electrical assembly and a method of making the substrate are also provided, as is an information handling system (e.g., computer) incorporating the circuitized substrate of the invention as part thereof.
    Type: Application
    Filed: March 23, 2005
    Publication date: October 6, 2005
    Applicant: Endicott Interconnect Technologies, Inc.
    Inventors: Robert Japp, Irving Memis, Kostas Papathomas
  • Publication number: 20050079289
    Abstract: A method and structure relating to multisegmented plated through holes. A substrate includes a dielectric layer sandwiched between a first laminate layer and a second laminate layer. A through hole is formed through the substrate. The through hole passes through nonplatable dielectric material within the dielectric layer. As a result, subsequent seeding and electroplating of the through hole results in a conductive metal plating forming at a wall of the through hole on a segment of the first laminate layer and on a segment of the second laminate layer, but not on the nonplatable dielectric material of the dielectric layer. Thus, the conductive metal plating is not continuous from the first laminate layer to the second laminate layer.
    Type: Application
    Filed: August 14, 2003
    Publication date: April 14, 2005
    Inventors: Donald Farquhar, Robert Japp, John Lauffer, Konstantinos Papathomas
  • Publication number: 20050048408
    Abstract: A laminate circuit structure assembly is provided that comprises at least two modularized circuitized voltage plane subassemblies; optionally an interposer located between each of the subassemblies, and wherein the subassemblies and interposer, if present, are bonded together with a cured dielectric coating. The interposer comprises dielectric layers disposed about an internal electrically conductive layer.
    Type: Application
    Filed: October 25, 2004
    Publication date: March 3, 2005
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Robert Japp, Gregory Kevern, William Rudik
  • Publication number: 20050026051
    Abstract: The glass transmittance of UV light having a wavelength of 365 nanometers is reduced by compounding an oxide or salt of at least one of Fe, Cu, Cr, Ce, Mn and mixtures thereof. The fiberglass cloth can be used for providing reinforced prepregs used in producing printed circuit boards or laminated chip carrier substrates.
    Type: Application
    Filed: August 30, 2004
    Publication date: February 3, 2005
    Applicant: International Business Machines Corporation
    Inventors: Robert Japp, Pamela Lulkoski, Jeffrey McKeveny, Jan Obrzut, Kenneth Potter