Patents by Inventor Robert John Rees

Robert John Rees has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10824468
    Abstract: A method of controlling a data processor to perform data processing operations is disclosed in which a host processor prepares one or more queue(s) of operations for execution by the data processor. When an error is encountered in the processing of an operation for one of the one or more queue(s), a queue can be set into an error state in which instructions that may have a data dependency on another operation are not executed. The host processor includes in the queues error barrier instructions that divide the respective queues into sets of operations between which there are no data processing dependencies. An error state for a queue can thus be cleared when its processing reaches the next error barrier instruction in the queue.
    Type: Grant
    Filed: February 12, 2019
    Date of Patent: November 3, 2020
    Assignee: Arm Limited
    Inventors: Mark Underwood, Sandeep Kakarlapudi, Robert John Rees
  • Publication number: 20200257555
    Abstract: A method of controlling a data processor to perform data processing operations is disclosed in which a host processor prepares one or more queue(s) of operations for execution by the data processor. When an error is encountered in the processing of an operation for one of the one or more queue(s), a queue can be set into an error state in which instructions that may have a data dependency on another operation are not executed. The host processor includes in the queues error barrier instructions that divide the respective queues into sets of operations between which there are no data processing dependencies. An error state for a queue can thus be cleared when its processing reaches the next error barrier instruction in the queue.
    Type: Application
    Filed: February 12, 2019
    Publication date: August 13, 2020
    Applicant: Arm Limited
    Inventors: Mark Underwood, Sandeep Kakarlapudi, Robert John Rees
  • Patent number: 10732982
    Abstract: A data processing system comprises one or more data processing units, a configurable interconnect and control circuitry. The control circuitry allocates one or more of the data processing units to a virtual machine and configures the configurable interconnect so as route one or more data processing tasks from the virtual machine to the one or more data processing units allocated for use by that virtual machine. This can provide a flexible and adaptable data processing system for carrying out the data processing tasks of a virtual machine, with the particular allocation of data processing units being substantially transparent to the virtual machine.
    Type: Grant
    Filed: July 27, 2018
    Date of Patent: August 4, 2020
    Assignee: Arm Limited
    Inventors: Jussi Tuomas Pennala, Robert John Rees, Hakan Lars-Goran Persson
  • Publication number: 20190056955
    Abstract: A data processing system comprises one or more data processing units, a configurable interconnect and control circuitry. The control circuitry allocates one or more of the data processing units to a virtual machine and configures the configurable interconnect so as route one or more data processing tasks from the virtual machine to the one or more data processing units allocated for use by that virtual machine. This can provide a flexible and adaptable data processing system for carrying out the data processing tasks of a virtual machine, with the particular allocation of data processing units being substantially transparent to the virtual machine.
    Type: Application
    Filed: July 27, 2018
    Publication date: February 21, 2019
    Applicant: Arm Limited
    Inventors: Jussi Tuomas Pennala, Robert John Rees, Hakan Lars-Goran Persson