Abstract: A current-mode under voltage lockout (UVLO) circuit provides an output signal that indicates to connected devices whether a connected power supply is sufficient (i.e., of sufficient strength and stability) based on a comparison of a current that is proportional to the power supply and a reference current. The current-based UVLO circuit employs a reference current generator that is capable of providing a stable reference current and a voltage-to-current converter that provides a current proportional to the power supply voltage. A comparator compares the reference current to the current proportional to the power supply voltage and determines based on the magnitudes of the two currents whether the power supply voltage is sufficient or ‘good’ and generates an output signal indicating the status of the power supply voltage.

Abstract: Standardized scan cell logic is enabled to test board-level and circuit-level AC interfaces built into integrated CMOS circuits by verification of high-speed AC coupled non-CMOS logic level signals driven onto non-CMOS logic level AC coupled interconnects in those circuits.

Abstract: A current-mode under voltage lockout (UVLO) circuit provides an output signal that indicates to connected devices whether a connected power supply is sufficient (i.e., of sufficient strength and stability) based on a comparison of a current that is proportional to the power supply and a reference current. The current-based UVLO circuit employs a reference current generator that is capable of providing a stable reference current and a voltage-to-current converter that provides a current proportional to the power supply voltage. A comparator compares the reference current to the current proportional to the power supply voltage and determines based on the magnitudes of the two currents whether the power supply voltage is sufficient or ‘good’ and generates an output signal indicating the status of the power supply voltage.

Abstract: A laser driver includes two DC-coupled differential drive circuits in which the common mode voltage of the first differential drive circuit is maintained a level affording a high compliance voltage for a laser diode driven by the second differential drive circuit. This is accomplished by means of an operational amplifier which compares the common mode voltage of the second differential drive circuit to a reference voltage. The operational amplifier operates in a closed-loop configuration to draw current through a common mode bias resistor in the first differential drive circuit in order to force the common mode voltage of the second differential drive circuit to a desired value determined by the reference voltage.

Abstract: A high-speed current mirror and correction circuitry are provided to minimize current errors in short-channel MOS switched current mirrors. The current mirror supplies high current levels at high modulation speeds, while simultaneously exhibiting good output voltage compliance. The correction circuitry includes a buffer amplifier, current shaping circuit, and replica mirror section. The current shaping circuit is able to supply a differential reference current, to correct load current errors, in response to the replica mirror section matching the buffered load voltage.

Abstract: A circuit yielding a precise, programmable, finite temperature coefficient, in the form of either current or voltage, has been provided. Temperature independent and temperature dependent currents are manipulated through the use of digital to analog converters (DACs), with the sum of these currents representing the desired coefficient. The DACs are digitally programmable to provide the exact current required to meet a predetermined temperature coefficient. Electrical components requiring temperature compensation can be precisely controlled by supplying current at a known, predetermined temperature coefficient. A method of digitally programming a current or voltage having a predetermined finite temperature coefficient has also been provided.

Abstract: A software programmable device means such as a microprocessor discriminates between evoked response signals and post-pace polarization signals sensed by an implantable medical device. The polarity of the positive or negative change in voltage in respect of time (or dv/dt) of the waveform incident on the lead electrodes is monitored during a short period of time immediately following a paced event. It has been discovered that the post-pace polarization signal exhibits a relatively constant polarity during the capture detect window, and that the evoked response signal may cause the polarity of post-pace polarization signal to reverse during the capture detect window . The sign of the post-pace polarization polarity, either positive or negative, is determined by the design of the specific output circuitry. The evoked response signal may reverse the polarity of the sensed signal in either case, from positive to negative or from negative to positive, during the time window of interest.

Abstract: A method and apparatus for discriminating between evoked response signals and post-pace polarization signals sensed by a sense amplifier of an implantable medical device. The polarity of the positive or negative change in voltage in respect of time (or dv/dt) of the waveform incident on the lead electrodes is monitored during a short period of time immediately following a paced event. The post-pace polarization signal exhibits a relatively constant polarity during the capture detect window, and the evoked response signal may cause the polarity of post-pace polarization signal to reverse during the capture detect window. The sign of the post-pace polarization polarity, either positive or negative, is determined. The evoked response signal may reverse the polarity of the sensed signal from positive to negative or from negative to positive, during the time window of interest.

Abstract: A software programmable microprocessor discriminates between evoked response signals and post-pace polarization signals sensed by an implantable medical device. The polarity of the positive or negative change in voltage in respect of time (or dv/dt) of the waveform incident on the lead electrodes is monitored during a short period of time immediately following a paced event. It has been discovered that the post-pace polarization signal exhibits a relatively constant polarity during the capture detect window, and that the evoked response signal may cause the polarity of post-pace polarization signal to reverse during the capture detect window. The sign of the post-pace polarization polarity, either positive or negative, is determined by the design of the specific output circuitry. The evoked response signal may reverse the polarity of the sensed signal in either case, from positive to negative or from negative to positive, during the time window of interest.

Abstract: The programmable device means such as a microprocessor are employed to discriminate between evoked response signals and post-pace polarization signals sensed by an implantable medical device. The polarity of the positive or negative change in voltage in respect of time (or dv/dt) of the waveform incident on the lead electrodes is monitored during a short period of time immediately following a paced event. It has been discovered that the post-pace polarization signal exhibits a relatively constant polarity during the capture detect window, and that the evoked response signal may cause the polarity of post-pace polarization signal to reverse during the capture detect window . The sign of the post-pace polarization polarity, either positive or negative, is determined by the design of the specific output circuitry. The evoked response signal may reverse the polarity of the sensed signal in either case, from positive to negative or from negative to positive, during the time window of interest.

Abstract: Software programmable device means such as a microprocessor are employed to discriminate between evoked response signals and post-pace polarization signals sensed by an implantable medical device. The polarity of the positive or negative change in voltage in respect of time (or dv/dt) of the waveform incident on the lead electrodes is monitored during a short period of time immediately following a paced event. It has been discovered that the post-pace polarization signal exhibits a relatively constant polarity during the capture detect window, and that the evoked response signal may cause the polarity of post-pace polarization signal to reverse during the capture detect window. The sign of the post-pace polarization polarity, either positive or negative, is determined by the design of the specific output circuitry. The evoked response signal may reverse the polarity of the sensed signal in either case, from positive to negative or from negative to positive, during the time window of interest.

Abstract: The present invention permits discrimination between evoked response signals and post-pace polarization signals sensed by an implantable medical device by noting the polarity of the positive or negative change in voltage in respect of time (or dv/dt) of the waveform incident on the lead electrodes during a short period of time immediately following a paced event. It has been discovered that the post-pace polarization signal exhibits a relatively constant polarity during the capture detect window, and that the evoked response signal may cause the polarity of post-pace polarization signal to reverse during the capture detect window. The sign of the post-pace polarization polarity, either positive or negative, is determined by the design of the specific output circuitry. The evoked response signal may reverse the polarity of the sensed signal in either case, from positive to negative or from negative to positive, during the time window of interest.

Abstract: An apparatus conducts current through a two terminal inductive load. The apparatus has a first conduction path, from a first supply voltage to one terminal of the inductive load and a second conduction path from the second terminal of the inductive load to a second supply voltage. The first conduction path includes a switching device that is controlled by a field-effect transistor having a gate terminal, second terminal, and third terminal. The gate terminal of the field-effect transistor is coupled to a reference voltage. The voltage at the second terminal of the field-effect transistor increases when the voltage at the field-effect transistor's third terminal increases.