Abstract: Disclosed herein are an imaging assembly and a method of controlling the imaging assembly. The assembly includes a housing having a sensor configured to detect radiation impinging on the sensor from a plurality of directions. The assembly may employ one or more shields, including a first internal shield having a first annular body between a first inner surface and a first outer surface. The first internal shield is configured to be placed in the housing such that the first inner surface at least partially surrounds the sensor. When the first internal shield is placed in the housing, the sensor is configured to receive a first central zone radiation through a first field of view, and a first peripheral zone radiation through a first peripheral view. The assembly is configured to provide at least one of a controllable field of view and reduced background contamination in an image domain.

Abstract: Disclosed herein are an imaging assembly and a method of controlling the imaging assembly. The assembly includes a housing having a sensor configured to detect radiation impinging on the sensor from a plurality of directions. The assembly may employ one or more shields, including a first internal shield having a first annular body between a first inner surface and a first outer surface. The first internal shield is configured to be placed in the housing such that the first inner surface at least partially surrounds the sensor. When the first internal shield is placed in the housing, the sensor is configured to receive a first central zone radiation through a first field of view, and a first peripheral zone radiation through a first peripheral view. The assembly is configured to provide at least one of a controllable field of view and reduced background contamination in an image domain.

Abstract: An imaging assembly includes a radiation camera configured to obtain position-sensitive radiation data of at least one source of interest. The assembly includes a controller includes a processor and tangible, non-transitory memory on which is recorded instructions for executing a method for reducing background interference in the position-sensitive radiation data in an image domain. The controller is programmed to generate a first set of image data (G1) from the position-sensitive radiation data with a first energy window. A second set of image data (G2) is generated from the position-sensitive radiation data with a second energy window such that the second energy window does not overlap with the first energy window. A third set of image data (G3) is generated having reduced background interference, based at least partially on the first and second sets of image data.

Abstract: An imaging assembly includes a radiation camera configured to obtain position-sensitive radiation data of at least one source of interest. The assembly includes a controller includes a processor and tangible, non-transitory memory on which is recorded instructions for executing a method for reducing background interference in the position-sensitive radiation data in an image domain. The controller is programmed to generate a first set of image data (G1) from the position-sensitive radiation data with a first energy window. A second set of image data (G2) is generated from the position-sensitive radiation data with a second energy window such that the second energy window does not overlap with the first energy window. A third set of image data (G3) is generated having reduced background interference, based at least partially on the first and second sets of image data.

Abstract: A first transistor of a level shifter provides conductivity between a reference voltage and a node of the level shifter to hold a state of the level shifter output. When an input signal of the level shifter switches, additional transistors assist in reducing the conductivity of the first transistor. This enhances the ability of the level shifter to change the state of the output in response to the change in the input signal, thereby improving the writeability of the level shifter.

Abstract: A first transistor of a level shifter provides conductivity between a reference voltage and a node of the level shifter to hold a state of the level shifter output. When an input signal of the level shifter switches, additional transistors assist in reducing the conductivity of the first transistor. This enhances the ability of the level shifter to change the state of the output in response to the change in the input signal, thereby improving the writeability of the level shifter.