Patents by Inventor Robert Kerr Henderson

Robert Kerr Henderson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9313434
    Abstract: A pixel circuit includes a single photon avalanche diode (SPAD) and a measurement circuit including a capacitance. The circuit is operable to discharge a known portion of the charge on the capacitance upon each detection of a SPAD event within a time period, such that the charge remaining on the capacitance at the end of the time period corresponds to the number of SPAD events detected within the time period. A time resolved imaging apparatus includes an array of such pixel circuits. A method of counting photon detection includes sensing photons with a SPAD device and discharging a known portion of the charge on a capacitance upon each detection of a SPAD event within a time period.
    Type: Grant
    Filed: October 30, 2013
    Date of Patent: April 12, 2016
    Assignee: STMicroelectronics (Research & Development) Limited
    Inventors: Neale Dutton, Robert Kerr Henderson
  • Patent number: 9178100
    Abstract: A single photon avalanche diode for use in a CMOS integrated circuit includes a deep n-well region formed above a p-type substrate and an n-well region formed above and in contact with the deep n-well region. A cathode contact is connected to the n-well region via a heavily doped n-type implant. A lightly doped region forms a guard ring around the n-well and deep n-well regions. A p-well region is adjacent to the lightly doped region. An anode contact is connected to the p-well region via a heavily doped p-type implant. The junction between the bottom of the deep n-well region and the substrate forms a multiplication region when an appropriate bias voltage is applied between the anode and cathode and the guard ring breakdown voltage is controlled with appropriate control of the lateral doping concentration gradient such that the breakdown voltage is higher than that of the multiplication region.
    Type: Grant
    Filed: September 8, 2011
    Date of Patent: November 3, 2015
    Assignees: STMicroelectronics (Research & Development) Limited, The University Court of the University of Edinburgh
    Inventors: Eric Alexander Garner Webster, Robert Kerr Henderson
  • Publication number: 20140124653
    Abstract: A pixel circuit includes a single photon avalanche diode (SPAD) and a measurement circuit including a capacitance. The circuit is operable to discharge a known portion of the charge on the capacitance upon each detection of a SPAD event within a time period, such that the charge remaining on the capacitance at the end of the time period corresponds to the number of SPAD events detected within the time period. A time resolved imaging apparatus includes an array of such pixel circuits. A method of counting photon detection includes sensing photons with a SPAD device and discharging a known portion of the charge on a capacitance upon each detection of a SPAD event within a time period.
    Type: Application
    Filed: October 30, 2013
    Publication date: May 8, 2014
    Applicants: The University Court of the University of Edinburgh, STMicroelectronics (Research & Development) Limited
    Inventors: Neale Dutton, Robert Kerr Henderson
  • Publication number: 20130193546
    Abstract: A single photon avalanche diode for use in a CMOS integrated circuit includes a deep n-well region formed above a p-type substrate and an n-well region formed above and in contact with the deep n-well region. A cathode contact is connected to the n-well region via a heavily doped n-type implant. A lightly doped region forms a guard ring around the n-well and deep n-well regions. A p-well region is adjacent to the lightly doped region. An anode contact is connected to the p-well region via a heavily doped p-type implant. The junction between the bottom of the deep n-well region and the substrate forms a multiplication region when an appropriate bias voltage is applied between the anode and cathode and the guard ring breakdown voltage is controlled with appropriate control of the lateral doping concentration gradient such that the breakdown voltage is higher than that of the multiplication region.
    Type: Application
    Filed: September 8, 2011
    Publication date: August 1, 2013
    Applicant: The University Court of the University of Edinburg
    Inventors: Eric Alexander Garner Webster, Robert Kerr Henderson