Patents by Inventor Robert L. Hedman

Robert L. Hedman has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • INTERACTIVE CHECKER IN A LAYOUT EDITOR
    Publication number: 20100287515
    Abstract: Methods, articles of manufacture and apparatus for testing design layouts. Design layout software may be configured to display a layout diagram in a first area of a graphical user interface (GUI) screen. Parameters for testing the layout may be entered in a second area of the GUI screen. Upon receiving one or more test parameters, the layout software may be configured to identify portions of the layout that do not conform to design rules based on the test parameters.
    Type: Application
    Filed: May 6, 2009
    Publication date: November 11, 2010
    Applicant: INTERNATIONAL BUSINESS MACHINES, CORPORATION
    Inventors: ROBERT L. HEDMAN, KARL L. LADIN
  • Personalizable semiconductor chips for analog and analog/digital circuits
    Patent number: 5517040
    Abstract: A computer converts a description of an analog circuit to a physical representation in terms of devices on a personalizable chip. The devices are placed and wired automatically for fabrication of the chip. Descriptions of resistors in the circuit are expanded by wiring multiple contacts of one or more actual resistor devices on the chip. The chip uses multiple rows of devices arranged in columns; each row contains multiple transistor and resistor devices.
    Type: Grant
    Filed: October 21, 1991
    Date of Patent: May 14, 1996
    Assignee: International Business Machines Corporation
    Inventors: Robert L. Hedman, Gordon G. Koehler, Karl L. Ladin, John T. Trnka
  • Differential summing amplifier for inputs having large common mode signals
    Patent number: 4698599
    Abstract: Differential input voltages are converted into current unbalances in a parallel-branch circuit. A load means converts the sum of the current unbalances to a differential voltage representing the sum of the input voltages.
    Type: Grant
    Filed: June 11, 1986
    Date of Patent: October 6, 1987
    Assignee: International Business Machines Corporation
    Inventor: Robert L. Hedman