Patents by Inventor Robert L. Reinhard

Robert L. Reinhard has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6246312
    Abstract: A resistor network for terminating active electronic circuits such as stub series terminated logic and emitter coupled logic circuits. The network has a substrate with top and bottom surfaces and a common via extending through the substrate. Several resistor pairs are located on the first surface surrounding the common via. Each resistor pair has first and second vias. Resistors are connected between the first and second vias. Several solder spheres are located on the bottom surface. Each of the solder spheres are electrically connected to one of the first, second or common vias.
    Type: Grant
    Filed: July 20, 2000
    Date of Patent: June 12, 2001
    Assignee: CTS Corporation
    Inventors: David L. Poole, Robert L. Reinhard, Richard O. Cooper, Richard S. DeMars
  • Patent number: 6194979
    Abstract: A wave transmission line terminator having application in computer data buss termination, single and multiple channel analog transmission line termination and other similar terminations uses thick film components including resistors and capacitors in combination with a ball grid array termination. The thick film resistors are placed on a first side of a substrate opposite the capacitors and ball grid array, and are electrically connected thereto by electrically conductive vias in the substrate. Several different configurations are disclosed which make the terminator more suitable for specific application.
    Type: Grant
    Filed: March 18, 1999
    Date of Patent: February 27, 2001
    Assignee: CTS Corporation
    Inventors: Terry R. Bloom, Richard O. Cooper, Robert L. Reinhard
  • Patent number: 6005777
    Abstract: A ball grid array capacitor has a substrate with a top and bottom surface and a via extending through the substrate. Several capacitors are located on the bottom surface. The capacitors include a top electrode connected to the via, a dielectric layer connected to the top electrode, and a bottom electrode that is connected to the dielectric layer and a ball pad over the bottom electrode. A passivation layer is located between the capacitors. Several solder spheres are electrically and mechanically connected to the bottom electrode. A resistor can be mounted on the top surface and connected to the via to form a filter.
    Type: Grant
    Filed: November 10, 1998
    Date of Patent: December 21, 1999
    Assignee: CTS Corporation
    Inventors: Terry R. Bloom, Richard O. Cooper, Robert L. Reinhard