Patents by Inventor Robert L. Scott

Robert L. Scott has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240078030
    Abstract: Apparatuses and methods related to port arbitration of a memory system are described. A memory system can receive a first number of transactions and a second transaction from a first traffic stream and a third number of transactions and a fourth transaction from a second traffic stream. The memory system can process the first number of transactions at least partially concurrently with the third number of transactions. Responsive to a total quantity of transactions of the first number of transactions and the second transaction being at least a threshold quantity of transactions, the second transaction can be processed by the memory system and, subsequent to processing the second transaction, the fourth transaction can be processed by the memory system.
    Type: Application
    Filed: September 6, 2022
    Publication date: March 7, 2024
    Inventors: Patrick A. La Fratta, Shashank Adavally, Jeffrey L. Scott, Robert M. Walker
  • Patent number: 10102134
    Abstract: A processor includes a cache, a prefetcher module to select information according to a prefetcher algorithm, and a prefetcher algorithm selection module. The prefetcher algorithm selection module includes logic to select a candidate prefetcher algorithm determine and store memory addresses of predicted memory accesses of the candidate prefetcher algorithm when performed by the prefetcher module, determine cache lines accessed during memory operations, and evaluate whether the determined cache lines match the stored memory addresses. The prefetcher algorithm selection module further includes logic to adjust an accuracy ratio of the candidate prefetcher algorithm, compare the accuracy ratio with a threshold accuracy ratio, and determine whether to apply the first candidate prefetcher algorithm to the prefetcher module.
    Type: Grant
    Filed: June 23, 2016
    Date of Patent: October 16, 2018
    Assignee: Intel Corporation
    Inventors: Zeshan A. Chishti, Christopher B. Wilkerson, Seth Pugsley, Peng-Fei Chuang, Robert L. Scott, Aamer Jaleel, Shih-Lien L. Lu, Kingsum Chow
  • Publication number: 20160299847
    Abstract: A processor includes a cache, a prefetcher module to select information according to a prefetcher algorithm, and a prefetcher algorithm selection module. The prefetcher algorithm selection module includes logic to select a candidate prefetcher algorithm determine and store memory addresses of predicted memory accesses of the candidate prefetcher algorithm when performed by the prefetcher module, determine cache lines accessed during memory operations, and evaluate whether the determined cache lines match the stored memory addresses. The prefetcher algorithm selection module further includes logic to adjust an accuracy ratio of the candidate prefetcher algorithm, compare the accuracy ratio with a threshold accuracy ratio, and determine whether to apply the first candidate prefetcher algorithm to the prefetcher module.
    Type: Application
    Filed: June 23, 2016
    Publication date: October 13, 2016
    Inventors: Zeshan A. Chishti, Christopher B. Wilkerson, Seth Pugsley, Peng-Fei Chuang, Robert L. Scott, Aamer Jaleel, Shih-Lien L. Lu, Kingsum Chow
  • Patent number: 9378021
    Abstract: A processor includes a cache, a prefetcher module to select information according to a prefetcher algorithm, and a prefetcher algorithm selection module. The prefetcher algorithm selection module includes logic to select a candidate prefetcher algorithm determine and store memory addresses of predicted memory accesses of the candidate prefetcher algorithm when performed by the prefetcher module, determine cache lines accessed during memory operations, and evaluate whether the determined cache lines match the stored memory addresses. The prefetcher algorithm selection module further includes logic to adjust an accuracy ratio of the candidate prefetcher algorithm, compare the accuracy ratio with a threshold accuracy ratio, and determine whether to apply the first candidate prefetcher algorithm to the prefetcher module.
    Type: Grant
    Filed: February 14, 2014
    Date of Patent: June 28, 2016
    Assignee: Intel Corporation
    Inventors: Zeshan A. Chishti, Christopher B. Wilkerson, Seth Pugsley, Peng-Fei Chuang, Robert L. Scott, Aamer Jaleel, Shih-Lien L. Lu, Kingsum Chow
  • Patent number: 9286224
    Abstract: In an embodiment, a processor includes at least one core having one or more execution units, a first cache memory and a first cache control logic. The first cache control logic may be configured to generate a first prefetch request to prefetch first data, where this request is to be aborted if the first data is not present in a second cache memory coupled to the first cache memory. Other embodiments are described and claimed.
    Type: Grant
    Filed: November 26, 2013
    Date of Patent: March 15, 2016
    Assignee: Intel Corporation
    Inventors: Seth H. Pugsley, Robert L. Scott, Zeshan A. Chishti, Peng-Fei Chuang, Khun Ban, Christopher B. Wilkerson, Shih-Lien L. Lu, Kingsum Chow
  • Publication number: 20150234663
    Abstract: A processor includes a cache, a prefetcher module to select information according to a prefetcher algorithm, and a prefetcher algorithm selection module. The prefetcher algorithm selection module includes logic to select a candidate prefetcher algorithm determine and store memory addresses of predicted memory accesses of the candidate prefetcher algorithm when performed by the prefetcher module, determine cache lines accessed during memory operations, and evaluate whether the determined cache lines match the stored memory addresses. The prefetcher algorithm selection module further includes logic to adjust an accuracy ratio of the candidate prefetcher algorithm, compare the accuracy ratio with a threshold accuracy ratio, and determine whether to apply the first candidate prefetcher algorithm to the prefetcher module.
    Type: Application
    Filed: February 14, 2014
    Publication date: August 20, 2015
    Inventors: Zeshan A. Chishti, Christopher B. Wilkerson, Seth Pugsley, Peng-Fei Chuang, Robert L. Scott, Aamer Jaleel, Shih-Lien L. Lu, Kingsum Chow
  • Publication number: 20150149714
    Abstract: In an embodiment, a processor includes at least one core having one or more execution units, a first cache memory and a first cache control logic. The first cache control logic may be configured to generate a first prefetch request to prefetch first data, where this request is to be aborted if the first data is not present in a second cache memory coupled to the first cache memory. Other embodiments are described and claimed.
    Type: Application
    Filed: November 26, 2013
    Publication date: May 28, 2015
    Inventors: Seth H. Pugsley, Robert L. Scott, Zeshan A. Chishti, Peng-Fei Chuang, Khun Ban, Christopher B. Wilkerson, Shih-Lien L. Lu, Kingsum Chow
  • Patent number: 8087847
    Abstract: The present invention is an apparatus used to launch a tire deflation device into the path of a fleeing vehicle. The present invention makes use of a guide frame to support and guide the tire deflation device towards the intended destination. The energy storing mechanism stores the energy required to launch the tire deflation device. The push train delivers the energy to the tire deflation device. The launching of the tire deflation device is triggered by a wireless remote system, otherwise known as the wireless trigger mechanism.
    Type: Grant
    Filed: March 17, 2011
    Date of Patent: January 3, 2012
    Inventor: Robert L. Scott
  • Publication number: 20110229260
    Abstract: The present invention is an apparatus used to launch a tire deflation device into the path of a fleeing vehicle. The present invention makes use of a guide frame to support and guide the tire deflation device towards the intended destination. The energy storing mechanism stores the energy required to launch the tire deflation device. The push train delivers the energy to the tire deflation device. The launching of the tire deflation device is triggered by a wireless remote system, otherwise known as the wireless trigger mechanism.
    Type: Application
    Filed: March 17, 2011
    Publication date: September 22, 2011
    Inventor: Robert L. Scott
  • Patent number: 5549750
    Abstract: A compact slide spinner is disclosed. In the preferred embodiment, the compact slide spinner is used to prepare smears for microscopic evaluation. The spinner incorporates a disposable or reusable slide holder which encases a portion of a slide onto which the material to be smeared is placed. The holder containing the slide is then accelerated by spinning. Specimen fluid not adhering to the slide is contained within the slide holder which is discarded following preparation of the smear. Using this low-cost device, a uniform quality smear is quickly and easily prepared, while reducing the risk that laboratory personnel will be exposed to aerosol borne contagions.
    Type: Grant
    Filed: July 1, 1994
    Date of Patent: August 27, 1996
    Assignee: Norfolk Scientific, Inc.
    Inventors: Thomas F. Kelley, Larry E. Shephard, Robert L. Scott
  • Patent number: 5326398
    Abstract: A compact slide spinner is disclosed. In the preferred embodiment, the compact slide spinner is used to prepare smears for microscopic evaluation. The spinner incorporates a disposable or reusable slide holder which encases a portion of a slide onto which the material to be smeared is placed. The holder containing the slide is then accelerated by spinning. Specimen fluid not adhering to the slide is contained within the slide holder which is discarded following preparation of the smear. Using this low-cost device, a uniform quality smear is quickly and easily prepared, while reducing the risk that laboratory personnel will be exposed to aerosol borne contagions.
    Type: Grant
    Filed: July 22, 1992
    Date of Patent: July 5, 1994
    Assignee: Statspin Technologies
    Inventors: Thomas F. Kelley, Larry E. Shephard, Robert L. Scott
  • Patent number: 5264228
    Abstract: Compositions for preparing cocoa beverages are prepared by mixing cocoa powder, non-fat milk solids, malto-dextrin, an emulsifier and an artificial sweetener to make a mixture which then is ground to disperse the emulsifier and to reduce lumps. The ground mixture then is agglomerated and after a resting period of up to 120 seconds, the agglomerates are dried.
    Type: Grant
    Filed: June 1, 1992
    Date of Patent: November 23, 1993
    Assignee: Nestec S.A.
    Inventors: Lee W. Pray, Robert L. Scott
  • Patent number: 5016515
    Abstract: An aid to tuning musical instruments. A microprocessor-controlled frequency standard is used to control a shift-register whose data is the digitized sound detected by a microphone. The data from the shift register are loaded into a parallel-load latch and then used to control an array of indicator lights. The pattern in the lights indicates the error in pitch of the sounded note. A person tunes a musical instrument by making the pattern in the lights become nearly stationary. The same synthesized frequency is made available in a speaker.
    Type: Grant
    Filed: October 29, 1990
    Date of Patent: May 21, 1991
    Assignee: Robert L. Scott
    Inventor: Robert L. Scott
  • Patent number: 4981585
    Abstract: A disk shaped cassette for centrifugal fluid separation, particularly blood separation, and a drive system for high speed rotation of the cassette. The cassette is driven at speeds which permit very rapid separation of the blood in times on the order of seven (7) to twenty (20) seconds by an automated control. The cassette is supported by a flexible support coupling and mounting system that permits the entire rotating mass to spin about the center of mass unique to the particular cassette as filled. The cassette typically includes a peripheral collection chamber which may be either annular, lobed or channel shaped. A cassette enabled to hold plural separation tubes is also shown. A gel can be placed in the cassette with a density between the fluid components to be separated and after centrifuging maintains the component separation that centrifuging creates.
    Type: Grant
    Filed: June 28, 1989
    Date of Patent: January 1, 1991
    Assignee: Norfolk Scientific, Inc.
    Inventors: Thomas F. Kelley, Robert L. Scott
  • Patent number: 4846974
    Abstract: A disk shaped cassette for centrifugal fluid separation, particularly blood separation, and a drive system for high speed rotation of the cassette. The cassette is driven at speeds which permit very rapid separation of the blood in times on the order of seven (7) to twenty (20) seconds by an automated control. The cassette is supported by a flexible support coupling and mounting system that permits the entire rotating mass to spin about the center of mass unique to the particular cassette as filled. The cassette typically includes a peripheral collection chamber which may be either annular, lobed or channel shaped. A cassette enabled to hold plural separation tubes is also shown. A gel can be placed in the cassette with a density between the fluid components to separated and after centrifuging maintains the component separation that centrifuging creates.
    Type: Grant
    Filed: November 14, 1985
    Date of Patent: July 11, 1989
    Assignee: Norfolk Scientific, Inc.
    Inventors: Thomas F. Kelley, Robert L. Scott
  • Patent number: 4476095
    Abstract: A fluorometric titrator has means to transfer a pipette between first and second positions and a buret for a chelating agent has a reversible drive powered either by a pulse generator or an oscillator. Valve controlled means are operable to place the buret in communication with the pipette or a reservoir. In the first position of the pipette, a precise sample volume is aspirated into it by the buret, then driven by the oscillator and in its second position and with the buret drive reversed but still powered by the oscillator, the sample volume is discharged from the pipette into a cuvette in the fluorometer. On the resulting fluorescence the fluorometer output drives the pulse generator to dispense chelating agent and to operate a counter until a selected end point is reached. The pipette is then returned to its second position with the buret drive again operated by the oscillator and during the return, the buret is refilled.
    Type: Grant
    Filed: April 12, 1974
    Date of Patent: October 9, 1984
    Inventors: Robert L. Scott, Samuel Nejame, Jr., Charles S. Jacobs, Jr., Charles A. Bell
  • Patent number: D269561
    Type: Grant
    Filed: July 16, 1982
    Date of Patent: July 5, 1983
    Inventor: Robert L. Scott
  • Patent number: D378539
    Type: Grant
    Filed: December 20, 1995
    Date of Patent: March 18, 1997
    Inventor: Robert L. Scott
  • Patent number: D392875
    Type: Grant
    Filed: December 26, 1995
    Date of Patent: March 31, 1998
    Inventor: Robert L. Scott
  • Patent number: D397618
    Type: Grant
    Filed: June 19, 1997
    Date of Patent: September 1, 1998
    Assignee: Cosmo Communications Corporation
    Inventors: Robert L. Scott, Jan Tonyan